From patchwork Wed Dec 19 18:03:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 10737953 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5031D6C5 for ; Wed, 19 Dec 2018 18:32:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 407972B5B0 for ; Wed, 19 Dec 2018 18:32:14 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 346202B5B5; Wed, 19 Dec 2018 18:32:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B2B6F2B5B0 for ; Wed, 19 Dec 2018 18:32:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=8Rym0nIs4MIUyqQWQPa1kDDVjU28dlIa4BnuJ5VinVM=; b=GO5Q62MoNceIL/ Nl/a0GxQ2hqno9u++a+RfQXhtE3JTK8krwTxbaf+asCTfb87q/aiRelFyDoBNkFlbh+v/SUpRD+km TXFaACUmlXwMe4spgzBurhZjSjJFcOUhbD5TgAWxlHSc5LAoOOih4HCx8gW6j91BcRFpOopruoC39 9IFbDyeVMbweVJvtF70II1+a5EC/4Oy/VA8wm9v8sbU0kM8vU6Fij62LpMUpRLC82zQL611IyNZ29 vScNV8rHZpPIB+gTNuszoms0bOy+4iTL3T3ReRj0ESf7U4I/L7KpnHg6Hg4Akafn/kn/qJSFFMknp 5fVbSE4Pcb9FvoeXtapg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gZgdc-0006dP-Gm; Wed, 19 Dec 2018 18:32:08 +0000 Received: from merlin.infradead.org ([2001:8b0:10b:1231::1]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gZgdH-0006KA-O3 for linux-arm-kernel@bombadil.infradead.org; Wed, 19 Dec 2018 18:31:47 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=merlin.20170209; h=Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=AWG3fphtnXdWG4VOONK2OtKx0zZx+n9tNVKBWveqIOs=; b=TEaua6zEeVwfnlKmmXbiQIiDg6 A9mM23DG1ul1duaIOqdOrbqSEDp9Q1YniqJJdSVzT10z9JaIlr9Jr9oCRrio2f7L5VHcUg+ilwOi9 +gY3K9eGPUpG0h0cBOo+o5p+zhmAALjOQbdvQ8eOMCNiLLl8m6r/mVsdL0XGlZ6zJ12+2Tnvifk0p nbLRWTzAYS1cqpV/mnZgzQEUO7lO/Z6SA8Vifj8KYm4avonNprpLaccfqhg48HUZ1PxgPtskOJEZ9 q7LtKocjqbyQWDYX8c3QRd+1b+lnnW2Hf+QLuefyq8m1JS6WdRP/dGL2ljjdt6UkaBHuaL2HHuSl0 YvONU1fA==; Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70] helo=foss.arm.com) by merlin.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gZgDs-0000VB-OR for linux-arm-kernel@lists.infradead.org; Wed, 19 Dec 2018 18:05:33 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AEBCC1713; Wed, 19 Dec 2018 10:05:21 -0800 (PST) Received: from filthy-habits.cambridge.arm.com (filthy-habits.cambridge.arm.com [10.1.196.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2F55C3F675; Wed, 19 Dec 2018 10:05:19 -0800 (PST) From: Marc Zyngier To: Paolo Bonzini , =?utf-8?b?UmFkaW0gS3LEjW3DocWZ?= Subject: [PATCH 26/28] arm64: KVM: Avoid setting the upper 32 bits of VTCR_EL2 to 1 Date: Wed, 19 Dec 2018 18:03:47 +0000 Message-Id: <20181219180349.242681-27-marc.zyngier@arm.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181219180349.242681-1-marc.zyngier@arm.com> References: <20181219180349.242681-1-marc.zyngier@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181219_130532_925516_AB98F07A X-CRM114-Status: GOOD ( 14.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Punit Agrawal , kvm@vger.kernel.org, Julien Thierry , "Gustavo A . R . Silva" , Will Deacon , Christoffer Dall , linux-arm-kernel@lists.infradead.org, punitagrawal@gmail.com, =?utf-8?q?Ale?= =?utf-8?q?x_Benn=C3=A9e?= , kvmarm@lists.cs.columbia.edu, Suzuki Poulose , Lukas Braun Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Will Deacon Although bit 31 of VTCR_EL2 is RES1, we inadvertently end up setting all of the upper 32 bits to 1 as well because we define VTCR_EL2_RES1 as signed, which is sign-extended when assigning to kvm->arch.vtcr. Lucky for us, the architecture currently treats these upper bits as RES0 so, whilst we've been naughty, we haven't set fire to anything yet. Cc: Cc: Marc Zyngier Cc: Christoffer Dall Signed-off-by: Will Deacon Signed-off-by: Marc Zyngier --- arch/arm64/include/asm/kvm_arm.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h index 9921bb7ab6d8..9c1a065b78ea 100644 --- a/arch/arm64/include/asm/kvm_arm.h +++ b/arch/arm64/include/asm/kvm_arm.h @@ -104,7 +104,7 @@ TCR_EL2_ORGN0_MASK | TCR_EL2_IRGN0_MASK | TCR_EL2_T0SZ_MASK) /* VTCR_EL2 Registers bits */ -#define VTCR_EL2_RES1 (1 << 31) +#define VTCR_EL2_RES1 (1U << 31) #define VTCR_EL2_HD (1 << 22) #define VTCR_EL2_HA (1 << 21) #define VTCR_EL2_PS_SHIFT TCR_EL2_PS_SHIFT