From patchwork Mon Jan 21 14:41:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Agner X-Patchwork-Id: 10773945 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 63588913 for ; Mon, 21 Jan 2019 14:41:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 529A92A066 for ; Mon, 21 Jan 2019 14:41:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 45B942A46E; Mon, 21 Jan 2019 14:41:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.0 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D72062A462 for ; Mon, 21 Jan 2019 14:41:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=SxIrxLLkWqTt6eUkVdJRkvUhEsA+LWftz/Sr48tDbLM=; b=AcVGK7gM2Antg4 NF+dlsLDrYVUyt11/NUsP8fQ2CeFsbmGWAaKAXKfSL2BFA25Zojtbmh3KkaWgz9eDn5LKa5U7IiXh 4xTEzvAXa8svPE3XersK3G099X/YOjSNiOiuYlL4pVZFmdlEXYn5RQUnHZqao+8a8moJemGfelSYx dbtJ7ragJhDMAEHhU7v5GLprPHGklGZnU6DmZGD0+vjjmcEbX081Kv/E9Mn5gUTxr6MVG7R8s/AY5 VoFPu3z+wBCma9LKpx+gLDOHaXwW1Efmu7xeadsz0XeMPb1TFFJu5hnfk1c72BMhvlLn354kE20SQ KuYucMEnqbKq4nfDVVZw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1glalM-0007OV-2h; Mon, 21 Jan 2019 14:41:20 +0000 Received: from mail.kmu-office.ch ([2a02:418:6a02::a2]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1glalI-0007OC-2E for linux-arm-kernel@lists.infradead.org; Mon, 21 Jan 2019 14:41:17 +0000 Received: from trochilidae.toradex.int (unknown [46.140.72.82]) by mail.kmu-office.ch (Postfix) with ESMTPSA id 6DAA95C0DDF; Mon, 21 Jan 2019 15:41:14 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=agner.ch; s=dkim; t=1548081674; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type: content-transfer-encoding:content-transfer-encoding:in-reply-to: references; bh=36Vgv2tUCbEBYJlFXjiAD+zVk0oMuY2Xq3ip8++bE/s=; b=dUJysieoDiEUtcIs+lEiSQKyps7pp42edC07GPnmkBIDMuT8kTHFRIxKelGGB3ypV4RWLp +H++7J0Za+RXsQ9UZhFcJK9CF/EvCWgZFgEro3Xe5AILegKwvf88kNBstiikJKBIu7Cmsx acNW4wjSxt1fheT3udJy7OIqPcco4Lo= From: Stefan Agner To: will.deacon@arm.com, mark.rutland@arm.com Subject: [PATCH] drivers/perf: handle multiple CPUs with single interrupts Date: Mon, 21 Jan 2019 15:41:11 +0100 Message-Id: <20190121144111.22716-1-stefan@agner.ch> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190121_064116_401833_5FBDAED6 X-CRM114-Status: GOOD ( 19.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org, Stefan Agner , linux-imx@nxp.com, kernel@pengutronix.de, fabio.estevam@nxp.com, shawnguo@kernel.org, linux-arm-kernel@lists.infradead.org, l.stach@pengutronix.de Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Currently, if only a single interrupt is available, the code assigns this single interrupt to the first CPU. All other CPUs are left unsupported. This allows to use perf events only on processes using the first CPU. This is not obvious to the user. Instead, disable interrupts but support all CPUs. This allows to use the PMU on all CPUs for all events other than sampling events which do require interrupt support. Signed-off-by: Stefan Agner --- This has been observed and tested on a i.MX 6DualLite, but is probably valid for i.MX 6Quad as well. It seems that ux500 once had support for single IRQ on a SMP system, however this got removed with: Commit 2b05f6ae1ee5 ("ARM: ux500: remove PMU IRQ bouncer") I noticed that with this patch I get an error when trying to use perf stat: # perf top Error: cycles: PMU Hardware doesn't support sampling/overflow-interrupts. Try 'perf stat' Without this patch perf top seems to work, but it seems not to use any sampling events (?): # perf top PerfTop: 7215 irqs/sec kernel:100.0% exact: 0.0% [4000Hz cpu-clock:pppH], (all, 2 CPUs) .... Also starting perf top and explicitly selecting cpu-clock seems to work and show the same data as before this change. # perf top -e cpu-clock:pppH PerfTop: 7214 irqs/sec kernel:100.0% exact: 0.0% [4000Hz cpu-clock:pppH], (all, 2 CPUs) It seems that perf top falls back to cpu-clock in the old case, but not once sampling events are not supported... -- Stefan drivers/perf/arm_pmu_platform.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/perf/arm_pmu_platform.c b/drivers/perf/arm_pmu_platform.c index 933bd8410fc2..80b991417b6e 100644 --- a/drivers/perf/arm_pmu_platform.c +++ b/drivers/perf/arm_pmu_platform.c @@ -105,23 +105,26 @@ static int pmu_parse_irqs(struct arm_pmu *pmu) return num_irqs; } + if (num_irqs == 1) { + int irq = platform_get_irq(pdev, 0); + if (irq && irq_is_percpu_devid(irq)) + return pmu_parse_percpu_irq(pmu, irq); + } + /* * In this case we have no idea which CPUs are covered by the PMU. * To match our prior behaviour, we assume all CPUs in this case. + * Multiple CPUs with a single PMU irq are currently not handled. + * Rather than supporting only the first CPU, support all CPUs but + * without interrupt capability. */ - if (num_irqs == 0) { - pr_warn("no irqs for PMU, sampling events not supported\n"); + if (num_irqs == 0 || (nr_cpu_ids > 1 && num_irqs == 1)) { + pr_info("No per CPU irqs for PMU, sampling events not supported\n"); pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT; cpumask_setall(&pmu->supported_cpus); return 0; } - if (num_irqs == 1) { - int irq = platform_get_irq(pdev, 0); - if (irq && irq_is_percpu_devid(irq)) - return pmu_parse_percpu_irq(pmu, irq); - } - if (nr_cpu_ids != 1 && !pmu_has_irq_affinity(pdev->dev.of_node)) { pr_warn("no interrupt-affinity property for %pOF, guessing.\n", pdev->dev.of_node);