| Message ID | 20190129080926.36773-8-Zhiqiang.Hou@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | PCI: refactor Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs | expand |
Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in> On Tue, Jan 29, 2019 at 1:39 PM Z.q. Hou <zhiqiang.hou@nxp.com> wrote: > > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > > As the .map_bus() use the WIN_NUM_0 for CFG transactions, > it's better passing WIN_NUM_0 explicitly when initialize > the CFG outbound window. > > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com> > --- > V3: > - No change > > drivers/pci/controller/pcie-mobiveil.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > > diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c > index b2cc9c097fc9..df71c11b4810 100644 > --- a/drivers/pci/controller/pcie-mobiveil.c > +++ b/drivers/pci/controller/pcie-mobiveil.c > @@ -612,9 +612,8 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) > */ > > /* config outbound translation window */ > - program_ob_windows(pcie, pcie->ob_wins_configured, > - pcie->ob_io_res->start, 0, CFG_WINDOW_TYPE, > - resource_size(pcie->ob_io_res)); > + program_ob_windows(pcie, WIN_NUM_0, pcie->ob_io_res->start, 0, > + CFG_WINDOW_TYPE, resource_size(pcie->ob_io_res)); > > /* memory inbound translation window */ > program_ib_windows(pcie, WIN_NUM_1, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE); > -- > 2.17.1 >
diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index b2cc9c097fc9..df71c11b4810 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -612,9 +612,8 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) */ /* config outbound translation window */ - program_ob_windows(pcie, pcie->ob_wins_configured, - pcie->ob_io_res->start, 0, CFG_WINDOW_TYPE, - resource_size(pcie->ob_io_res)); + program_ob_windows(pcie, WIN_NUM_0, pcie->ob_io_res->start, 0, + CFG_WINDOW_TYPE, resource_size(pcie->ob_io_res)); /* memory inbound translation window */ program_ib_windows(pcie, WIN_NUM_1, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE);