Message ID | 20190205001721.18639-3-tpiepho@impinj.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Workaround for IMX7d PCI-e PLL lock failure | expand |
Am Dienstag, den 05.02.2019, 00:17 +0000 schrieb Trent Piepho: > This adds the PHY as a new node. The PCI-e controller node gains a > phandle property that points to it. > > There isn't yet any code in the kernel that uses this device's > registers, but it will be added for a PCIe PLL erratum workaround. > > Signed-off-by: Trent Piepho <tpiepho@impinj.com> Looks good, but needs an Ack on the binding change. Also this should go through Shawns tree, so needs to be split out from the series. Regards, Lucas > --- > arch/arm/boot/dts/imx7d.dtsi | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi > index 6b298e388f4b..6eb98e7c568d 100644 > --- a/arch/arm/boot/dts/imx7d.dtsi > +++ b/arch/arm/boot/dts/imx7d.dtsi > @@ -96,6 +96,14 @@ > > }; > }; > > +&aips2 { > + pcie_phy: pcie-phy@306d0000 { > + compatible = "fsl,imx7d-pcie-phy"; > + reg = <0x306d0000 0x10000>; > + status = "disabled"; > + }; > +}; > + > &aips3 { > usbotg2: usb@30b20000 { > compatible = "fsl,imx7d-usb", "fsl,imx27-usb"; > @@ -173,6 +181,7 @@ > <&src IMX7_RESET_PCIE_CTRL_APPS_EN>, > <&src IMX7_RESET_PCIE_CTRL_APPS_TURNOFF>; > reset-names = "pciephy", "apps", "turnoff"; > + fsl,imx7d-pcie-phy = <&pcie_phy>; > status = "disabled"; > }; > };
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi index 6b298e388f4b..6eb98e7c568d 100644 --- a/arch/arm/boot/dts/imx7d.dtsi +++ b/arch/arm/boot/dts/imx7d.dtsi @@ -96,6 +96,14 @@ }; }; +&aips2 { + pcie_phy: pcie-phy@306d0000 { + compatible = "fsl,imx7d-pcie-phy"; + reg = <0x306d0000 0x10000>; + status = "disabled"; + }; +}; + &aips3 { usbotg2: usb@30b20000 { compatible = "fsl,imx7d-usb", "fsl,imx27-usb"; @@ -173,6 +181,7 @@ <&src IMX7_RESET_PCIE_CTRL_APPS_EN>, <&src IMX7_RESET_PCIE_CTRL_APPS_TURNOFF>; reset-names = "pciephy", "apps", "turnoff"; + fsl,imx7d-pcie-phy = <&pcie_phy>; status = "disabled"; }; };
This adds the PHY as a new node. The PCI-e controller node gains a phandle property that points to it. There isn't yet any code in the kernel that uses this device's registers, but it will be added for a PCIe PLL erratum workaround. Signed-off-by: Trent Piepho <tpiepho@impinj.com> --- arch/arm/boot/dts/imx7d.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)