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Tue, 5 Feb 2019 00:17:40 +0000 From: Trent Piepho To: "linux-pci@vger.kernel.org" Subject: [PATCH v2 2/3] ARM: dts: imx7d: Add node for PCIe PHY Thread-Topic: [PATCH v2 2/3] ARM: dts: imx7d: Add node for PCIe PHY Thread-Index: AQHUvOg03kf45m4W4U2GQOHN/EPVEg== Date: Tue, 5 Feb 2019 00:17:40 +0000 Message-ID: <20190205001721.18639-3-tpiepho@impinj.com> References: <20190205001721.18639-1-tpiepho@impinj.com> In-Reply-To: <20190205001721.18639-1-tpiepho@impinj.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: BYAPR07CA0078.namprd07.prod.outlook.com (2603:10b6:a03:12b::19) To MWHPR0601MB3708.namprd06.prod.outlook.com (2603:10b6:301:7c::38) authentication-results: spf=none (sender IP is ) smtp.mailfrom=tpiepho@impinj.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.14.4 x-originating-ip: [216.207.205.253] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; MWHPR0601MB3722; 6:QNaE1YBXNNqbDXK13oQdpV/6FiuDRa+e48Cif0Yca/YAYzbOp6BrHZtXMkFR3h6otQpvdBCk7kImYfbfE1/ZOgr7aOnwIFilIW46aeM+haIwbg7jYHAjxRvegGXJmcBLoCJXNtUV+geSqDdGprbMqUk4/R4ALto8HmDDVYiDzR1b46ZMrgtVzbrh1/wqBVbgYxwkoD5Szq6PTiFPe2rOPtkpwyMO4DEvWi2YoVmwWbdo1KPRhoCuqiE0tt14LOLba7k92frw1xdD5yxJed8NQ8OHVeyUj/fLWhrsKvaDXrOtYmYsHNgc2vB7ICL8KAnbN60W3jyGEVqOiMU7pVNOoAfHTG2o9o5fY6UBvvmgmr2cnf00uwkhS+x7MU+8io0uZ8WAL6Iban28aYBt5aHHcUGSTmw976YwjIzzi6z7QOoxQ7Qfl5hqVVjfMkjXgKwS9H1vPGCmilT0XjFnalstlw==; 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The PCI-e controller node gains a phandle property that points to it. There isn't yet any code in the kernel that uses this device's registers, but it will be added for a PCIe PLL erratum workaround. Signed-off-by: Trent Piepho --- arch/arm/boot/dts/imx7d.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi index 6b298e388f4b..6eb98e7c568d 100644 --- a/arch/arm/boot/dts/imx7d.dtsi +++ b/arch/arm/boot/dts/imx7d.dtsi @@ -96,6 +96,14 @@ }; }; +&aips2 { + pcie_phy: pcie-phy@306d0000 { + compatible = "fsl,imx7d-pcie-phy"; + reg = <0x306d0000 0x10000>; + status = "disabled"; + }; +}; + &aips3 { usbotg2: usb@30b20000 { compatible = "fsl,imx7d-usb", "fsl,imx27-usb"; @@ -173,6 +181,7 @@ <&src IMX7_RESET_PCIE_CTRL_APPS_EN>, <&src IMX7_RESET_PCIE_CTRL_APPS_TURNOFF>; reset-names = "pciephy", "apps", "turnoff"; + fsl,imx7d-pcie-phy = <&pcie_phy>; status = "disabled"; }; };