Message ID | 20190227063737.24445-4-daniel.baluta@nxp.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Enable wm8524 on i.MX8MQ-EVK | expand |
On Wed, Feb 27, 2019 at 3:38 AM Daniel Baluta <daniel.baluta@nxp.com> wrote: > + sai2: sai@308b0000 { > + #sound-dai-cells = <0>; > + compatible = "fsl,imx8mq-sai", > + "fsl,imx6sx-sai"; > + reg = <0x308b0000 0x10000>; > + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clk IMX8MQ_CLK_SAI2_IPG>, > + <&clk IMX8MQ_CLK_DUMMY>, > + <&clk IMX8MQ_CLK_SAI2_ROOT>, > + <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>; > + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; mclk0 is not a valid entry as per the binding doc.
On Thu, Feb 28, 2019 at 8:49 PM Fabio Estevam <festevam@gmail.com> wrote: > > On Wed, Feb 27, 2019 at 3:38 AM Daniel Baluta <daniel.baluta@nxp.com> wrote: > > > + sai2: sai@308b0000 { > > + #sound-dai-cells = <0>; > > + compatible = "fsl,imx8mq-sai", > > + "fsl,imx6sx-sai"; > > + reg = <0x308b0000 0x10000>; > > + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&clk IMX8MQ_CLK_SAI2_IPG>, > > + <&clk IMX8MQ_CLK_DUMMY>, > > + <&clk IMX8MQ_CLK_SAI2_ROOT>, > > + <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>; > > + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; > > mclk0 is not a valid entry as per the binding doc. Indeed, will fix in next version. mclk0 is valid in our internal tree because fsl_sai.c supports it. Will remove mclk0 for now and re-add it when I will upstream the SAI patch. Thanks Fabio for review!
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 9d48450453fb..565f4175e73b 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -489,6 +489,22 @@ status = "disabled"; }; + sai2: sai@308b0000 { + #sound-dai-cells = <0>; + compatible = "fsl,imx8mq-sai", + "fsl,imx6sx-sai"; + reg = <0x308b0000 0x10000>; + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MQ_CLK_SAI2_IPG>, + <&clk IMX8MQ_CLK_DUMMY>, + <&clk IMX8MQ_CLK_SAI2_ROOT>, + <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dmas = <&sdma1 10 24 0>, <&sdma1 11 24 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + i2c1: i2c@30a20000 { compatible = "fsl,imx8mq-i2c", "fsl,imx21-i2c"; reg = <0x30a20000 0x10000>;
SAI2 is part of AIPS-3 memory region. Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> --- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)