From patchwork Thu Mar 7 16:58:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Jernej_=C5=A0krabec?= X-Patchwork-Id: 10843423 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C0831922 for ; Thu, 7 Mar 2019 17:00:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AA7DA2F68F for ; Thu, 7 Mar 2019 17:00:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A8B072F664; Thu, 7 Mar 2019 17:00:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0FDE92F68F for ; Thu, 7 Mar 2019 17:00:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=og7ZKnzy+nJc3YRe5wj1948LVSiuabTzB+sPF9iIdmk=; b=hzF20TuJlKupQd B9Aup9L2thJ5vCWXJLZf1F1ALv/i35+NtIDx5gxt77uX8ZNp5Y7SR3H63vAUJfBFr5QQ4PbpSEMgz snmCJgPa6oaQ+EYbtitA1JLv/ECfyR3rwWo6FyqPeBkW939Mpolb/SmB9duqleZ5IY0DJGuZL1Z1O VpwUY4gyTLsFDLlQKxXEZ8dsawPiDAbgntNDfGLOj8ZPVBnnzN3lhnrBsn22xd044uFfzEBSMbu0H tJyYHFODzT6jUqwJdfjvzb05k39Pw3si3robamPMjG07Pyfd7AbS11JS5/Xp2evdWvMoOCE1ueyO4 9TkzFPhpI2s1JOB8SswA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1h1wNE-0002Zx-Ky; Thu, 07 Mar 2019 17:00:00 +0000 Received: from mailoutvs8.siol.net ([185.57.226.199] helo=mail.siol.net) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1h1wMA-00011d-8F for linux-arm-kernel@lists.infradead.org; Thu, 07 Mar 2019 16:58:57 +0000 Received: from localhost (localhost [127.0.0.1]) by mail.siol.net (Zimbra) with ESMTP id F154D5237E2; Thu, 7 Mar 2019 17:58:49 +0100 (CET) X-Virus-Scanned: amavisd-new at psrvmta12.zcs-production.pri Received: from mail.siol.net ([127.0.0.1]) by localhost (psrvmta12.zcs-production.pri [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id tFNNt1AedaiO; Thu, 7 Mar 2019 17:58:49 +0100 (CET) Received: from mail.siol.net (localhost [127.0.0.1]) by mail.siol.net (Zimbra) with ESMTPS id 8BCA85237FB; Thu, 7 Mar 2019 17:58:49 +0100 (CET) Received: from localhost.localdomain (cpe-86-58-52-202.static.triera.net [86.58.52.202]) (Authenticated sender: 031275009) by mail.siol.net (Zimbra) with ESMTPSA id 3A45E5237FA; Thu, 7 Mar 2019 17:58:47 +0100 (CET) From: Jernej Skrabec To: maxime.ripard@bootlin.com, wens@csie.org Subject: [PATCH 5/6] dmaengine: sun6i: Add support for H6 DMA Date: Thu, 7 Mar 2019 17:58:28 +0100 Message-Id: <20190307165829.9086-6-jernej.skrabec@siol.net> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190307165829.9086-1-jernej.skrabec@siol.net> References: <20190307165829.9086-1-jernej.skrabec@siol.net> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190307_085854_792147_4129E249 X-CRM114-Status: GOOD ( 13.42 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, jernej.skrabec@siol.net, linux-sunxi@googlegroups.com, linux-kernel@vger.kernel.org, vkoul@kernel.org, robh+dt@kernel.org, dmaengine@vger.kernel.org, dan.j.williams@intel.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP H6 DMA has more than 32 supported DRQs, which means that configuration register is slightly rearranged. It also needs additional clock to be enabled. Add support for it. Signed-off-by: Jernej Skrabec --- drivers/dma/sun6i-dma.c | 44 +++++++++++++++++++++++++++++++++++++++-- 1 file changed, 42 insertions(+), 2 deletions(-) diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c index 6a37f8bb39b1..eceedd139651 100644 --- a/drivers/dma/sun6i-dma.c +++ b/drivers/dma/sun6i-dma.c @@ -69,14 +69,19 @@ #define DMA_CHAN_CUR_CFG 0x0c #define DMA_CHAN_MAX_DRQ_A31 0x1f +#define DMA_CHAN_MAX_DRQ_H6 0x3f #define DMA_CHAN_CFG_SRC_DRQ_A31(x) ((x) & DMA_CHAN_MAX_DRQ_A31) +#define DMA_CHAN_CFG_SRC_DRQ_H6(x) ((x) & DMA_CHAN_MAX_DRQ_H6) #define DMA_CHAN_CFG_SRC_MODE_A31(x) (((x) & 0x1) << 5) +#define DMA_CHAN_CFG_SRC_MODE_H6(x) (((x) & 0x1) << 8) #define DMA_CHAN_CFG_SRC_BURST_A31(x) (((x) & 0x3) << 7) #define DMA_CHAN_CFG_SRC_BURST_H3(x) (((x) & 0x3) << 6) #define DMA_CHAN_CFG_SRC_WIDTH(x) (((x) & 0x3) << 9) #define DMA_CHAN_CFG_DST_DRQ_A31(x) (DMA_CHAN_CFG_SRC_DRQ_A31(x) << 16) +#define DMA_CHAN_CFG_DST_DRQ_H6(x) (DMA_CHAN_CFG_SRC_DRQ_H6(x) << 16) #define DMA_CHAN_CFG_DST_MODE_A31(x) (DMA_CHAN_CFG_SRC_MODE_A31(x) << 16) +#define DMA_CHAN_CFG_DST_MODE_H6(x) (DMA_CHAN_CFG_SRC_MODE_H6(x) << 16) #define DMA_CHAN_CFG_DST_BURST_A31(x) (DMA_CHAN_CFG_SRC_BURST_A31(x) << 16) #define DMA_CHAN_CFG_DST_BURST_H3(x) (DMA_CHAN_CFG_SRC_BURST_H3(x) << 16) #define DMA_CHAN_CFG_DST_WIDTH(x) (DMA_CHAN_CFG_SRC_WIDTH(x) << 16) @@ -319,12 +324,24 @@ static void sun6i_set_drq_a31(u32 *p_cfg, s8 src_drq, s8 dst_drq) DMA_CHAN_CFG_DST_DRQ_A31(dst_drq); } +static void sun6i_set_drq_h6(u32 *p_cfg, s8 src_drq, s8 dst_drq) +{ + *p_cfg |= DMA_CHAN_CFG_SRC_DRQ_H6(src_drq) | + DMA_CHAN_CFG_DST_DRQ_H6(dst_drq); +} + static void sun6i_set_mode_a31(u32 *p_cfg, s8 src_mode, s8 dst_mode) { *p_cfg |= DMA_CHAN_CFG_SRC_MODE_A31(src_mode) | DMA_CHAN_CFG_DST_MODE_A31(dst_mode); } +static void sun6i_set_mode_h6(u32 *p_cfg, s8 src_mode, s8 dst_mode) +{ + *p_cfg |= DMA_CHAN_CFG_SRC_MODE_H6(src_mode) | + DMA_CHAN_CFG_DST_MODE_H6(dst_mode); +} + static size_t sun6i_get_chan_size(struct sun6i_pchan *pchan) { struct sun6i_desc *txd = pchan->desc; @@ -1160,6 +1177,28 @@ static struct sun6i_dma_config sun50i_a64_dma_cfg = { BIT(DMA_SLAVE_BUSWIDTH_8_BYTES), }; +/* + * The H6 binding uses the number of dma channels from the + * device tree node. + */ +static struct sun6i_dma_config sun50i_h6_dma_cfg = { + .clock_autogate_enable = sun6i_enable_clock_autogate_h3, + .set_burst_length = sun6i_set_burst_length_h3, + .set_drq = sun6i_set_drq_h6, + .set_mode = sun6i_set_mode_h6, + .src_burst_lengths = BIT(1) | BIT(4) | BIT(8) | BIT(16), + .dst_burst_lengths = BIT(1) | BIT(4) | BIT(8) | BIT(16), + .src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) | + BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | + BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) | + BIT(DMA_SLAVE_BUSWIDTH_8_BYTES), + .dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) | + BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | + BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) | + BIT(DMA_SLAVE_BUSWIDTH_8_BYTES), + .mbus_clk = true, +}; + /* * The V3s have only 8 physical channels, a maximum DRQ port id of 23, * and a total of 24 usable source and destination endpoints. @@ -1190,6 +1229,7 @@ static const struct of_device_id sun6i_dma_match[] = { { .compatible = "allwinner,sun8i-h3-dma", .data = &sun8i_h3_dma_cfg }, { .compatible = "allwinner,sun8i-v3s-dma", .data = &sun8i_v3s_dma_cfg }, { .compatible = "allwinner,sun50i-a64-dma", .data = &sun50i_a64_dma_cfg }, + { .compatible = "allwinner,sun50i-h6-dma", .data = &sun50i_h6_dma_cfg }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, sun6i_dma_match); @@ -1288,8 +1328,8 @@ static int sun6i_dma_probe(struct platform_device *pdev) ret = of_property_read_u32(np, "dma-requests", &sdc->max_request); if (ret && !sdc->max_request) { dev_info(&pdev->dev, "Missing dma-requests, using %u.\n", - DMA_CHAN_MAX_DRQ_A31); - sdc->max_request = DMA_CHAN_MAX_DRQ_A31; + DMA_CHAN_MAX_DRQ_H6); + sdc->max_request = DMA_CHAN_MAX_DRQ_H6; } /*