| Message ID | 20190325135300.6440-17-maxime.ripard@bootlin.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [01/28] dt-bindings: arm: Remove the CPU compatible documentation | expand |
On Mon, Mar 25, 2019 at 9:53 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > We switched to the generic pinctrl binding some time ago, yet the GMAC > pinctrl node apparently slipped through. Fix this. > > Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi index 28ff54d45549..c1aa26db44ae 100644 --- a/arch/arm/boot/dts/sun9i-a80.dtsi +++ b/arch/arm/boot/dts/sun9i-a80.dtsi @@ -961,11 +961,10 @@ #gpio-cells = <3>; gmac_rgmii_pins: gmac-rgmii-pins { - allwinner,pins = "PA0", "PA1", "PA2", "PA3", - "PA4", "PA5", "PA7", "PA8", - "PA9", "PA10", "PA12", "PA13", - "PA15", "PA16", "PA17"; - allwinner,function = "gmac"; + pins = "PA0", "PA1", "PA2", "PA3", "PA4", "PA5", + "PA7", "PA8", "PA9", "PA10", "PA12", + "PA13", "PA15", "PA16", "PA17"; + function = "gmac"; /* * data lines in RGMII mode use DDR mode * and need a higher signal drive strength
We switched to the generic pinctrl binding some time ago, yet the GMAC pinctrl node apparently slipped through. Fix this. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> --- arch/arm/boot/dts/sun9i-a80.dtsi | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-)