diff mbox series

[3/7] ARM: dts: sun8i: a83t: Add nodes for UART2-UART4

Message ID 20190327001843.2420-4-megous@megous.com (mailing list archive)
State New, archived
Headers show
Series Add bluetooth, gps and accelerometer to TBS A711 | expand

Commit Message

Ondřej Jirman March 27, 2019, 12:18 a.m. UTC 
From: Ondrej Jirman <megous@megous.com>

A83T has 5 UART interfaces, but only the first two have their nodes
defined in sun8i-a83t.dtsi. Add nodes for the missing interfaces.

Signed-off-by: Ondrej Jirman <megous@megous.com>
---
 arch/arm/boot/dts/sun8i-a83t.dtsi | 33 +++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

Comments

Maxime Ripard April 1, 2019, 8 a.m. UTC | #1 
On Wed, Mar 27, 2019 at 01:18:39AM +0100, megous@megous.com wrote:
> From: Ondrej Jirman <megous@megous.com>
>
> A83T has 5 UART interfaces, but only the first two have their nodes
> defined in sun8i-a83t.dtsi. Add nodes for the missing interfaces.
>
> Signed-off-by: Ondrej Jirman <megous@megous.com>

Applied, thanks!
Maxime

--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index fcb7ef5ce2df..e5c39eef1c29 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -873,6 +873,39 @@ 
 			status = "disabled";
 		};
 
+		uart2: serial@1c28800 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x01c28800 0x400>;
+			interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clocks = <&ccu CLK_BUS_UART2>;
+			resets = <&ccu RST_BUS_UART2>;
+			status = "disabled";
+		};
+
+		uart3: serial@1c28c00 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x01c28c00 0x400>;
+			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clocks = <&ccu CLK_BUS_UART3>;
+			resets = <&ccu RST_BUS_UART3>;
+			status = "disabled";
+		};
+
+		uart4: serial@1c29000 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x01c29000 0x400>;
+			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clocks = <&ccu CLK_BUS_UART4>;
+			resets = <&ccu RST_BUS_UART4>;
+			status = "disabled";
+		};
+
 		i2c0: i2c@1c2ac00 {
 			compatible = "allwinner,sun8i-a83t-i2c",
 				     "allwinner,sun6i-a31-i2c";