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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id a20sm27017513wmb.17.2019.03.27.03.33.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 27 Mar 2019 03:33:12 -0700 (PDT) From: Neil Armstrong To: khilman@baylibre.com, jbrunet@baylibre.com Subject: [PATCH RFC 3/6] clk: meson: g12a: mark fclk_div3 as critical Date: Wed, 27 Mar 2019 11:33:05 +0100 Message-Id: <20190327103308.25058-4-narmstrong@baylibre.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190327103308.25058-1-narmstrong@baylibre.com> References: <20190327103308.25058-1-narmstrong@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190327_033315_913495_E2927860 X-CRM114-Status: GOOD ( 14.78 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP On Amlogic Meson G12b platform, the fclk_div3 seems to be necessary for the system to operate correctly. Disabling it cause the entire system to freeze, including peripherals. This patch patch marks this clock as critical, fixing boot on G12b platforms. Signed-off-by: Neil Armstrong --- drivers/clk/meson/g12a.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c index 03b4c78f558f..d62ebcd2162d 100644 --- a/drivers/clk/meson/g12a.c +++ b/drivers/clk/meson/g12a.c @@ -1062,6 +1062,16 @@ static struct clk_fixed_factor g12a_fclk_div3_div = { .ops = &clk_fixed_factor_ops, .parent_names = (const char *[]){ "fixed_pll" }, .num_parents = 1, + /* + * This clock is used by the resident firmware and is required + * by the platform to operate correctly. + * Until the following condition are met, we need this clock to + * be marked as critical: + * a) Mark the clock used by a firmware resource, if possible + * b) CCF has a clock hand-off mechanism to make the sure the + * clock stays on until the proper driver comes along + */ + .flags = CLK_IS_CRITICAL, }, };