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bh=3HdOcyQCq9wrU1AdvtM6R2lHiYyKElGkieSf9jn2Q7c=; b=B8Xxz305CSB/jogxRyD36QnikA1ZakinxtW737dxv6NnniuyRZ9ptNJSSyl96P10Pi lkz//gJ2NlbWLM56XDjMW1/VcRXJHsw6cn3qm3desmNMq20EbKRgd2bmb2iORdoKhLEr fWC1csIDA4VJxMkPZ4+FaW2iZzQW075jecFncUIqbhgXYx7lycbCREKoCXpN+ydDQC7O vgu5SqNXIp7b5BzMgMieDlGiznOFQAmZJeSlMYA0oh8T9pa4U+Tq+eE4ijZpZJ3hES7i gbAg/08159kgCBoRR8sk0CPXAFIrSRBTxxTEx6CTADSAjyuO1YuNSpyaYCTG49VoUQVP x4oA== X-Gm-Message-State: APjAAAVVFg7dDIgDt1dFN96ZlwCUxZ8p4DZa8kqZCES+o//jklcauXob tSDnhp51oMg68XjB3HkIOjoAx7QPkxw= X-Google-Smtp-Source: APXvYqx2Oo18Jx3VkscEBB1oKY6eJLnvphpNd1a9HsVS6sx8AtGlR9ieNrAJIWpUZ8BERwuqvHA5lg== X-Received: by 2002:a63:b64:: with SMTP id a36mr3487712pgl.58.1554348996718; Wed, 03 Apr 2019 20:36:36 -0700 (PDT) Received: from xps15.imgcgcw.net ([147.50.13.10]) by smtp.gmail.com with ESMTPSA id u5sm12212780pfm.121.2019.04.03.20.36.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 03 Apr 2019 20:36:36 -0700 (PDT) From: Mathieu Poirier To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 13/20] coresight: tmc-etr: Create per-thread buffer allocation function Date: Wed, 3 Apr 2019 21:35:34 -0600 Message-Id: <20190404033541.14072-14-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190404033541.14072-1-mathieu.poirier@linaro.org> References: <20190404033541.14072-1-mathieu.poirier@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190403_233639_410094_C84BD9A0 X-CRM114-Status: GOOD ( 13.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: suzuki.poulose@arm.com, alexander.shishkin@linux.intel.com, coresight@lists.linaro.org, linux-kernel@vger.kernel.org, peterz@infradead.org, mike.leach@arm.com, leo.yan@linaro.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Buffer allocation is different when dealing with per-thread and CPU-wide sessions. In preparation to support CPU-wide trace scenarios simplify things by keeping allocation functions for both type separate. Signed-off-by: Mathieu Poirier --- .../hwtracing/coresight/coresight-tmc-etr.c | 29 ++++++++++++++++++- 1 file changed, 28 insertions(+), 1 deletion(-) diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index e9c77009188a..ac1efdfc0d07 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -1206,6 +1206,33 @@ alloc_etr_buf(struct tmc_drvdata *drvdata, struct perf_event *event, return etr_buf; } +static struct etr_buf * +get_perf_etr_buf_per_thread(struct tmc_drvdata *drvdata, + struct perf_event *event, int nr_pages, + void **pages, bool snapshot) +{ + struct etr_buf *etr_buf; + + /* + * In per-thread mode the etr_buf isn't shared, so just go ahead + * with memory allocation. + */ + etr_buf = alloc_etr_buf(drvdata, event, nr_pages, pages, snapshot); + + return etr_buf; +} + +static struct etr_buf * +get_perf_etr_buf(struct tmc_drvdata *drvdata, struct perf_event *event, + int nr_pages, void **pages, bool snapshot) +{ + if (event->cpu == -1) + return get_perf_etr_buf_per_thread(drvdata, event, nr_pages, + pages, snapshot); + + return ERR_PTR(-ENOENT); +} + static struct etr_perf_buffer * tmc_etr_setup_perf_buf(struct tmc_drvdata *drvdata, struct perf_event *event, int nr_pages, void **pages, bool snapshot) @@ -1222,7 +1249,7 @@ tmc_etr_setup_perf_buf(struct tmc_drvdata *drvdata, struct perf_event *event, if (!etr_perf) return ERR_PTR(-ENOMEM); - etr_buf = alloc_etr_buf(drvdata, event, nr_pages, pages, snapshot); + etr_buf = get_perf_etr_buf(drvdata, event, nr_pages, pages, snapshot); if (!IS_ERR(etr_buf)) goto done;