From patchwork Thu Apr 11 10:19:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Ond=C5=99ej_Jirman?= X-Patchwork-Id: 10895593 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3B38E1708 for ; Thu, 11 Apr 2019 10:21:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 22EBC28C68 for ; Thu, 11 Apr 2019 10:21:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 16B5428C6A; Thu, 11 Apr 2019 10:21:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.4 required=2.0 tests=BAYES_00,DKIM_ADSP_DISCARD, DKIM_SIGNED,DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8F35D28C68 for ; Thu, 11 Apr 2019 10:21:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Ybdwat9ugPx8cUa0vwUL4w18s9oobL7WSM2kwbUZB8M=; b=OsYDg77qqGzfNO UAB0K4uP2POMtyQwDIe8BWfU0tUhuM8cESY8Chf8mZg8dP1BxXpoeIH6zWAqWKB1UfwfPEGGACfr+ vaiqeVwSsPVTaKCrvZ3idh2AHmQol+1qKZHfZvIGjAmUwHQ9h9knoJNVwXLH8U+F8JLB0j3YKDxTd J5BMIGGOGmytVo/mKLDPsapX4GMXbDE5HUvD7FJ0rgksMRFFc9Oc4kHTYuRrFSWfO6iKKtMSnd+qF JaEvipg9if6ZF48/FN4Wfi4cIuzOHVfs+/alE7s3YMcfHERN2IEIFCMyNbD1FLcrKaOE5kQEEN6Y3 EnC3Mp6jNRJAHg9/6Egg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hEWpe-0000cF-3B; Thu, 11 Apr 2019 10:21:22 +0000 Received: from vps.xff.cz ([195.181.215.36]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hEWoK-0006NJ-DI for linux-arm-kernel@lists.infradead.org; Thu, 11 Apr 2019 10:20:05 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=megous.com; s=mail; t=1554977995; bh=DdOJz/KUHvzyoOqY/X/p8VGDaZGkFFOEFng4t6EKayc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jj4C1aplFLTIhC+zesYBGtAgQarcYkxVN/3bdGBb6on/rJ3BytYOg8T5nHOIR2me7 ZxiqsSpiAQVKG1AmXYY6PB4+mjxspzXnWHLQL9icIf2jA8uDt22aUXsFxAaipBRG9i 8idxt9JEfJYf62x2x7cTjCFf0c3K4NJugm1yl4GQ= From: megous@megous.com To: linux-sunxi@googlegroups.com, Maxime Ripard , Chen-Yu Tsai , Rob Herring , Linus Walleij Subject: [PATCH v3 03/11] pinctrl: sunxi: Prepare for alternative bias voltage setting methods Date: Thu, 11 Apr 2019 12:19:43 +0200 Message-Id: <20190411101951.30223-4-megous@megous.com> In-Reply-To: <20190411101951.30223-1-megous@megous.com> References: <20190411101951.30223-1-megous@megous.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190411_032001_685435_80B2D9F3 X-CRM114-Status: GOOD ( 13.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ondrej Jirman , Mark Rutland , David Airlie , Chi-Hsien Lin , dri-devel@lists.freedesktop.org, linux-stm32@st-md-mailman.stormreply.com, brcm80211-dev-list@cypress.com, Jose Abreu , Naveen Gupta , devicetree@vger.kernel.org, Arend van Spriel , Alexandre Torgue , Hante Meuleman , linux-gpio@vger.kernel.org, Wright Feng , Giuseppe Cavallaro , linux-arm-kernel@lists.infradead.org, Franky Lin , Maxime Coquelin , brcm80211-dev-list.pdl@broadcom.com, netdev@vger.kernel.org, linux-wireless@vger.kernel.org, linux-kernel@vger.kernel.org, Kalle Valo , Daniel Vetter , "David S. Miller" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ondrej Jirman H6 has a different I/O voltage bias setting method than A80. Prepare existing code for using alternative bias voltage setting methods. Signed-off-by: Ondrej Jirman --- drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c | 2 +- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 47 +++++++++++++---------- drivers/pinctrl/sunxi/pinctrl-sunxi.h | 9 ++++- 3 files changed, 36 insertions(+), 22 deletions(-) diff --git a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c index da37d594a13d..0633a03d5e13 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c +++ b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c @@ -722,7 +722,7 @@ static const struct sunxi_pinctrl_desc sun9i_a80_pinctrl_data = { .npins = ARRAY_SIZE(sun9i_a80_pins), .irq_banks = 5, .disable_strict_mode = true, - .has_io_bias_cfg = true, + .io_bias_cfg_variant = BIAS_VOLTAGE_GRP_CONFIG, }; static int sun9i_a80_pinctrl_probe(struct platform_device *pdev) diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c index be04223591d4..98c4de5f4019 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c @@ -617,7 +617,7 @@ static int sunxi_pinctrl_set_io_bias_cfg(struct sunxi_pinctrl *pctl, u32 val, reg; int uV; - if (!pctl->desc->has_io_bias_cfg) + if (!pctl->desc->io_bias_cfg_variant) return 0; uV = regulator_get_voltage(supply); @@ -628,25 +628,32 @@ static int sunxi_pinctrl_set_io_bias_cfg(struct sunxi_pinctrl *pctl, if (uV == 0) return 0; - /* Configured value must be equal or greater to actual voltage */ - if (uV <= 1800000) - val = 0x0; /* 1.8V */ - else if (uV <= 2500000) - val = 0x6; /* 2.5V */ - else if (uV <= 2800000) - val = 0x9; /* 2.8V */ - else if (uV <= 3000000) - val = 0xA; /* 3.0V */ - else - val = 0xD; /* 3.3V */ - - pin -= pctl->desc->pin_base; - - reg = readl(pctl->membase + sunxi_grp_config_reg(pin)); - reg &= ~IO_BIAS_MASK; - writel(reg | val, pctl->membase + sunxi_grp_config_reg(pin)); - - return 0; + switch (pctl->desc->io_bias_cfg_variant) { + case BIAS_VOLTAGE_GRP_CONFIG: + /* + * Configured value must be equal or greater to actual + * voltage. + */ + if (uV <= 1800000) + val = 0x0; /* 1.8V */ + else if (uV <= 2500000) + val = 0x6; /* 2.5V */ + else if (uV <= 2800000) + val = 0x9; /* 2.8V */ + else if (uV <= 3000000) + val = 0xA; /* 3.0V */ + else + val = 0xD; /* 3.3V */ + + pin -= pctl->desc->pin_base; + + reg = readl(pctl->membase + sunxi_grp_config_reg(pin)); + reg &= ~IO_BIAS_MASK; + writel(reg | val, pctl->membase + sunxi_grp_config_reg(pin)); + return 0; + default: + return -EINVAL; + } } static int sunxi_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev) diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h index ee15ab067b5f..4bfc8a6d9dce 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h @@ -95,6 +95,13 @@ #define PINCTRL_SUN7I_A20 BIT(7) #define PINCTRL_SUN8I_R40 BIT(8) +enum sunxi_desc_bias_voltage { + BIAS_VOLTAGE_NONE, + /* Bias voltage configuration is done through + * Pn_GRP_CONFIG registers, as seen on A80 SoC. */ + BIAS_VOLTAGE_GRP_CONFIG, +}; + struct sunxi_desc_function { unsigned long variant; const char *name; @@ -117,7 +124,7 @@ struct sunxi_pinctrl_desc { const unsigned int *irq_bank_map; bool irq_read_needs_mux; bool disable_strict_mode; - bool has_io_bias_cfg; + int io_bias_cfg_variant; }; struct sunxi_pinctrl_function {