diff mbox series

[v3,4/5] nvmem: imx-ocotp: Add i.MX8MM support

Message ID 20190419171927.24269-5-pure.logic@nexus-software.ie (mailing list archive)
State New, archived
Headers show
Series Add i.MX8MM support | expand

Commit Message

Bryan O'Donoghue April 19, 2019, 5:19 p.m. UTC
This patch adds support to burn the fuses on the i.MX8MM.
https://www.nxp.com/webapp/Download?colCode=IMX8MMRM

The i.MX8MM is similar to i.MX6 processors in terms of addressing and clock
setup.

Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
---
 drivers/nvmem/imx-ocotp.c | 7 +++++++
 1 file changed, 7 insertions(+)

Comments

Leonard Crestez April 22, 2019, 10:46 a.m. UTC | #1
On 4/19/2019 8:19 PM, Bryan O'Donoghue wrote:
> This patch adds support to burn the fuses on the i.MX8MM.
> 
> The i.MX8MM is similar to i.MX6 processors in terms of addressing and clock
> setup.
> 
> Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
> ---
>   drivers/nvmem/imx-ocotp.c | 7 +++++++
>   1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c
> index 5b625d61e433..08006b07657b 100644
> --- a/drivers/nvmem/imx-ocotp.c
> +++ b/drivers/nvmem/imx-ocotp.c
> @@ -453,6 +453,12 @@ static const struct ocotp_params imx8mq_params = {
>   	.set_timing = imx_ocotp_set_imx7_timing,
>   };
>   
> +static const struct ocotp_params imx8mm_params = {
> +	.nregs = 60,
> +	.bank_address_words = 0,
> +	.set_timing = imx_ocotp_set_imx6_timing,
> +};

I'm not sure about that nregs. The reference manual documents registers 
up to 0x303507b0 in the "OCOTP" chapter while "fusemap" documents up to 
0x303513F0: that's where 60 vs 256 comes from.

This is from "i.MX 8M Mini Applications Processor Reference Manual" 
"Rev. 1 03/2019" from nxp.com: 
https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/i.mx-applications-processors/i.mx-8-processors/i.mx-8m-mini-arm-cortex-a53-cortex-m4-audio-voice-video:i.MX8MMINI?tab=Documentation_Tab

Same situation for 8mq and for that part we have nregs=256. All the 
higher fuses seem to be "reserved" but I don't think there's any harm in 
allowing reads. At least driver should be consistent for 8mm/8mq.

--
Regards,
Leonard
Bryan O'Donoghue April 22, 2019, 1:22 p.m. UTC | #2
On 22/04/2019 11:46, Leonard Crestez wrote:
> Same situation for 8mq and for that part we have nregs=256. All the
> higher fuses seem to be "reserved" but I don't think there's any harm in
> allowing reads. At least driver should be consistent for 8mm/8mq.

OK, well you're the NXP guy.

I don't mind expanding the fusemap to undocumented registers in principle.

---
bod
diff mbox series

Patch

diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c
index 5b625d61e433..08006b07657b 100644
--- a/drivers/nvmem/imx-ocotp.c
+++ b/drivers/nvmem/imx-ocotp.c
@@ -453,6 +453,12 @@  static const struct ocotp_params imx8mq_params = {
 	.set_timing = imx_ocotp_set_imx7_timing,
 };
 
+static const struct ocotp_params imx8mm_params = {
+	.nregs = 60,
+	.bank_address_words = 0,
+	.set_timing = imx_ocotp_set_imx6_timing,
+};
+
 static const struct of_device_id imx_ocotp_dt_ids[] = {
 	{ .compatible = "fsl,imx6q-ocotp",  .data = &imx6q_params },
 	{ .compatible = "fsl,imx6sl-ocotp", .data = &imx6sl_params },
@@ -463,6 +469,7 @@  static const struct of_device_id imx_ocotp_dt_ids[] = {
 	{ .compatible = "fsl,imx6sll-ocotp", .data = &imx6sll_params },
 	{ .compatible = "fsl,imx7ulp-ocotp", .data = &imx7ulp_params },
 	{ .compatible = "fsl,imx8mq-ocotp", .data = &imx8mq_params },
+	{ .compatible = "fsl,imx8mm-ocotp", .data = &imx8mm_params },
 	{ },
 };
 MODULE_DEVICE_TABLE(of, imx_ocotp_dt_ids);