@@ -2,7 +2,7 @@
//
// Device Tree file for LX2160AQDS
//
-// Copyright 2018 NXP
+// Copyright 2018-2019 NXP
/dts-v1/;
@@ -31,6 +31,14 @@
};
};
+&can0 {
+ status = "okay";
+};
+
+&can1 {
+ status = "okay";
+};
+
&crypto {
status = "okay";
};
@@ -2,7 +2,7 @@
//
// Device Tree file for LX2160ARDB
//
-// Copyright 2018 NXP
+// Copyright 2018-2019 NXP
/dts-v1/;
@@ -31,6 +31,22 @@
};
};
+&can0 {
+ status = "okay";
+
+ can-transceiver {
+ max-bitrate = <5000000>;
+ };
+};
+
+&can1 {
+ status = "okay";
+
+ can-transceiver {
+ max-bitrate = <5000000>;
+ };
+};
+
&crypto {
status = "okay";
};
@@ -2,7 +2,7 @@
//
// Device Tree Include file for Layerscape-LX2160A family SoC.
//
-// Copyright 2018 NXP
+// Copyright 2018-2019 NXP
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -581,6 +581,24 @@
status = "disabled";
};
+ can0: can@2180000 {
+ compatible = "fsl,lx2160ar1-flexcan";
+ reg = <0x0 0x2180000 0x0 0x10000>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&sysclk>, <&clockgen 4 7>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
+
+ can1: can@2190000 {
+ compatible = "fsl,lx2160ar1-flexcan";
+ reg = <0x0 0x2190000 0x0 0x10000>;
+ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&sysclk>, <&clockgen 4 7>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
+
uart0: serial@21c0000 {
compatible = "arm,sbsa-uart","arm,pl011";
reg = <0x0 0x21c0000 0x0 0x1000>;
Add flexcan node in LX2160A SOC file as well as in QDS and RDB files. The device tree bindings used can be referred from Documentation/devicetree/bindings/net/can/fsl-flexcan.txt Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> --- Notes (dts): Dependencies: - https://www.spinics.net/lists/linux-can/msg01562.html .../boot/dts/freescale/fsl-lx2160a-qds.dts | 10 ++++++++- .../boot/dts/freescale/fsl-lx2160a-rdb.dts | 18 +++++++++++++++- .../boot/dts/freescale/fsl-lx2160a.dtsi | 20 +++++++++++++++++- 3 files changed, 45 insertions(+), 3 deletions(-)