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Tue, 14 May 2019 07:38:21 +0000 From: Peter Chen To: "shawnguo@kernel.org" , "balbi@kernel.org" Subject: [PATCH v2 6/8] ARM: dts: imx7ulp: add imx7ulp USBOTG1 support Thread-Topic: [PATCH v2 6/8] ARM: dts: imx7ulp: add imx7ulp USBOTG1 support Thread-Index: AQHVCigBwvPXZQ0UVkuAwmjsg1TEmQ== Date: Tue, 14 May 2019 07:38:21 +0000 Message-ID: <20190514073529.29505-7-peter.chen@nxp.com> References: <20190514073529.29505-1-peter.chen@nxp.com> In-Reply-To: <20190514073529.29505-1-peter.chen@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.14.1 x-clientproxiedby: HK0PR03CA0086.apcprd03.prod.outlook.com (2603:1096:203:72::26) To VI1PR04MB5327.eurprd04.prod.outlook.com (2603:10a6:803:60::16) authentication-results: spf=none (sender IP is ) smtp.mailfrom=peter.chen@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.66] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 493f8dc9-6e1a-43ad-0f26-08d6d83f23d5 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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Signed-off-by: Peter Chen --- arch/arm/boot/dts/imx7ulp.dtsi | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi index fca6e50f37c8..60c9ea116d0a 100644 --- a/arch/arm/boot/dts/imx7ulp.dtsi +++ b/arch/arm/boot/dts/imx7ulp.dtsi @@ -30,6 +30,7 @@ serial1 = &lpuart5; serial2 = &lpuart6; serial3 = &lpuart7; + usbphy0 = &usbphy1; }; cpus { @@ -133,6 +134,36 @@ clock-names = "ipg", "per"; }; + usbotg1: usb@40330000 { + compatible = "fsl,imx7ulp-usb", "fsl,imx6ul-usb", + "fsl,imx27-usb"; + reg = <0x40330000 0x200>; + interrupts = ; + clocks = <&pcc2 IMX7ULP_CLK_USB0>; + phys = <&usbphy1>; + fsl,usbmisc = <&usbmisc1 0>; + ahb-burst-config = <0x0>; + tx-burst-size-dword = <0x8>; + rx-burst-size-dword = <0x8>; + status = "disabled"; + }; + + usbmisc1: usbmisc@40330200 { + #index-cells = <1>; + compatible = "fsl,imx7ulp-usbmisc", "fsl,imx7d-usbmisc", + "fsl,imx6q-usbmisc"; + reg = <0x40330200 0x200>; + }; + + usbphy1: usbphy@0x40350000 { + compatible = "fsl,imx7ulp-usbphy", + "fsl,imx6ul-usbphy", "fsl,imx23-usbphy"; + reg = <0x40350000 0x1000>; + interrupts = ; + clocks = <&pcc2 IMX7ULP_CLK_USB_PHY>; + #phy-cells = <0>; + }; + usdhc0: mmc@40370000 { compatible = "fsl,imx7ulp-usdhc", "fsl,imx6sx-usdhc"; reg = <0x40370000 0x10000>;