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Wed, 15 May 2019 11:09:25 +0000 From: Xiaowei Bao To: "shawnguo@kernel.org" , Leo Li , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: [PATCHv2] arm64: dts: ls1028a: add flexspi nodes Thread-Topic: [PATCHv2] arm64: dts: ls1028a: add flexspi nodes Thread-Index: AQHVCw6ogMFRF8ssNEKztKIHvtwUnw== Date: Wed, 15 May 2019 11:09:25 +0000 Message-ID: <20190515110924.13726-1-xiaowei.bao@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK2PR03CA0052.apcprd03.prod.outlook.com (2603:1096:202:17::22) To VI1PR04MB3310.eurprd04.prod.outlook.com (2603:10a6:802:f::20) authentication-results: spf=none (sender IP is ) smtp.mailfrom=xiaowei.bao@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 1b8a44bf-5f21-4a2d-a1c4-08d6d925ca5d x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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Property added for the FlexSPI controller and for the connected slave device for the LS1028ARDB and LS1028AQDS target. This is having one SPI-NOR flash device, mt35xu02g connected at CS0. Signed-off-by: Xiaowei Bao --- v2: - modify the commit message and the dts format. arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts | 15 +++++++++++++++ arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts | 15 +++++++++++++++ arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 12 ++++++++++++ 3 files changed, 42 insertions(+), 0 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts index 5bcd491..6e12806 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts @@ -158,6 +158,21 @@ }; }; +&fspi { + status = "okay"; + mt35xu02g: flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spansion,m25p80"; + m25p,fast-read; + spi-max-frequency = <20000000>; + reg = <0>; + /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */ + spi-rx-bus-width = <8>; /* 8 SPI Rx lines */ + spi-tx-bus-width = <1>; /* 1 SPI Tx line */ + }; +}; + &sai1 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts index 25d2370..5d39616 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts @@ -136,6 +136,21 @@ }; }; +&fspi { + status = "okay"; + mt35xu02g: flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spansion,m25p80"; + m25p,fast-read; + spi-max-frequency = <20000000>; + reg = <0>; + /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */ + spi-rx-bus-width = <8>; /* 8 SPI Rx lines */ + spi-tx-bus-width = <1>; /* 1 SPI Tx line */ + }; +}; + &duart0 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi index ba71a33..a27cd60 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi @@ -109,6 +109,18 @@ }; }; + fspi: spi@20c0000 { + compatible = "nxp,lx2160a-fspi", "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x20c0000 0x0 0x10000>, + <0x0 0x20000000 0x0 0x10000000>; + reg-names = "FSPI", "FSPI-memory"; + interrupts = <0 25 0x4>; /* Level high type */ + clocks = <&clockgen 4 3>, <&clockgen 4 3>; + clock-names = "fspi_en", "fspi"; + }; + soc: soc { compatible = "simple-bus"; #address-cells = <2>;