| Message ID | 20190531004848.32061-1-s-anna@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: ti: k3-j721e-main: Add Main NavSS Interrupt controller node | expand |
On 31/05/19 6:18 AM, Suman Anna wrote: > Add the Interrupt controller node for the Interrupt Router present within > the Main NavSS module. This Interrupt Router can route 192 interrupts to > the GIC_SPI in 3 sets of 64 interrupts each. Note that the last set is > reserved for the host ID A72_3 for hypervisor usecases, so the node is > added only with 2 sets for the Linux kernel context (host id A72_2). This > is specified through the ti,sci-rm-range-girq property. > > Signed-off-by: Suman Anna <s-anna@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Thanks and regards, Lokesh > --- > Hi Tero, > > This patch depends on the J721E series [1] from Nishanth. Patch tested > using additional patches exercising Mailbox IP. > > regards > Suman > > [1] https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=121189 > > arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > index d42912044a5d..36c51ff9a898 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > @@ -50,6 +50,24 @@ > #iommu-cells = <1>; > }; > > + cbass_main_navss: interconnect0 { > + compatible = "simple-bus"; > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + > + main_navss_intr: interrupt-controller1 { > + compatible = "ti,sci-intr"; > + ti,intr-trigger-type = <4>; > + interrupt-controller; > + interrupt-parent = <&gic500>; > + #interrupt-cells = <2>; > + ti,sci = <&dmsc>; > + ti,sci-dst-id = <14>; > + ti,sci-rm-range-girq = <0>, <2>; > + }; > + }; > + > secure_proxy_main: mailbox@32c00000 { > compatible = "ti,am654-secure-proxy"; > #mbox-cells = <1>; >
On 14/06/2019 17:47, Lokesh Vutla wrote: > > > On 31/05/19 6:18 AM, Suman Anna wrote: >> Add the Interrupt controller node for the Interrupt Router present within >> the Main NavSS module. This Interrupt Router can route 192 interrupts to >> the GIC_SPI in 3 sets of 64 interrupts each. Note that the last set is >> reserved for the host ID A72_3 for hypervisor usecases, so the node is >> added only with 2 sets for the Linux kernel context (host id A72_2). This >> is specified through the ti,sci-rm-range-girq property. >> >> Signed-off-by: Suman Anna <s-anna@ti.com> > > Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Queuing for 5.3, thanks. -Tero > > Thanks and regards, > Lokesh > >> --- >> Hi Tero, >> >> This patch depends on the J721E series [1] from Nishanth. Patch tested >> using additional patches exercising Mailbox IP. >> >> regards >> Suman >> >> [1] https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=121189 >> >> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 18 ++++++++++++++++++ >> 1 file changed, 18 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >> index d42912044a5d..36c51ff9a898 100644 >> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >> @@ -50,6 +50,24 @@ >> #iommu-cells = <1>; >> }; >> >> + cbass_main_navss: interconnect0 { >> + compatible = "simple-bus"; >> + #address-cells = <2>; >> + #size-cells = <2>; >> + ranges; >> + >> + main_navss_intr: interrupt-controller1 { >> + compatible = "ti,sci-intr"; >> + ti,intr-trigger-type = <4>; >> + interrupt-controller; >> + interrupt-parent = <&gic500>; >> + #interrupt-cells = <2>; >> + ti,sci = <&dmsc>; >> + ti,sci-dst-id = <14>; >> + ti,sci-rm-range-girq = <0>, <2>; >> + }; >> + }; >> + >> secure_proxy_main: mailbox@32c00000 { >> compatible = "ti,am654-secure-proxy"; >> #mbox-cells = <1>; >> -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index d42912044a5d..36c51ff9a898 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -50,6 +50,24 @@ #iommu-cells = <1>; }; + cbass_main_navss: interconnect0 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + main_navss_intr: interrupt-controller1 { + compatible = "ti,sci-intr"; + ti,intr-trigger-type = <4>; + interrupt-controller; + interrupt-parent = <&gic500>; + #interrupt-cells = <2>; + ti,sci = <&dmsc>; + ti,sci-dst-id = <14>; + ti,sci-rm-range-girq = <0>, <2>; + }; + }; + secure_proxy_main: mailbox@32c00000 { compatible = "ti,am654-secure-proxy"; #mbox-cells = <1>;
Add the Interrupt controller node for the Interrupt Router present within the Main NavSS module. This Interrupt Router can route 192 interrupts to the GIC_SPI in 3 sets of 64 interrupts each. Note that the last set is reserved for the host ID A72_3 for hypervisor usecases, so the node is added only with 2 sets for the Linux kernel context (host id A72_2). This is specified through the ti,sci-rm-range-girq property. Signed-off-by: Suman Anna <s-anna@ti.com> --- Hi Tero, This patch depends on the J721E series [1] from Nishanth. Patch tested using additional patches exercising Mailbox IP. regards Suman [1] https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=121189 arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)