| Message ID | 20190605163434.23173-4-s-anna@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add MCU SRAM nodes for TI K3 SoCs | expand |
On 05/06/2019 19:34, Suman Anna wrote: > Add the on-chip SRAM present within the MCU domain as a mmio-sram node. > The K3 J721E SoCs have 1 MB of such memory. Any specific memory range > within this RAM needed by a driver/software module ought to be reserved > using an appropriate child node. > > Signed-off-by: Suman Anna <s-anna@ti.com> Queuing for 5.3, thanks. -Tero > --- > arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi > index b72e033fa159..397ef715e145 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi > @@ -44,6 +44,14 @@ > pinctrl-single,function-mask = <0xffffffff>; > }; > > + mcu_ram: sram@41c00000 { > + compatible = "mmio-sram"; > + reg = <0x00 0x41c00000 0x00 0x100000>; > + ranges = <0x0 0x00 0x41c00000 0x100000>; > + #address-cells = <1>; > + #size-cells = <1>; > + }; > + > wkup_uart0: serial@42300000 { > compatible = "ti,j721e-uart", "ti,am654-uart"; > reg = <0x00 0x42300000 0x00 0x100>; > -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi index b72e033fa159..397ef715e145 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -44,6 +44,14 @@ pinctrl-single,function-mask = <0xffffffff>; }; + mcu_ram: sram@41c00000 { + compatible = "mmio-sram"; + reg = <0x00 0x41c00000 0x00 0x100000>; + ranges = <0x0 0x00 0x41c00000 0x100000>; + #address-cells = <1>; + #size-cells = <1>; + }; + wkup_uart0: serial@42300000 { compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x42300000 0x00 0x100>;
Add the on-chip SRAM present within the MCU domain as a mmio-sram node. The K3 J721E SoCs have 1 MB of such memory. Any specific memory range within this RAM needed by a driver/software module ought to be reserved using an appropriate child node. Signed-off-by: Suman Anna <s-anna@ti.com> --- arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)