| Message ID | 20190617083704.3941-3-horms+renesas@verge.net.au (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 3ed1db9071fde0ba9c4ce22a9b404887c0dbe909 |
| Headers | show |
| Series | arm64: dts: renesas: r8a7799[05]: Add cpg reset for LVDS Interface | expand |
Hi Simon, On Mon, Jun 17, 2019 at 10:37 AM Simon Horman <horms+renesas@verge.net.au> wrote: > From: Yoshihiro Kaneko <ykaneko0929@gmail.com> > > It is necessary to reset the LVDS Interface according to display on/off. This is not the LVDS interface. The LVDS interface has its own device node. > Therefore, this patch adds CPG reset properties in DU device node > for the R8A77995 SoC. > > This patch was inspired by a patch in the BSP by Takeshi Kihara > <takeshi.kihara.df@renesas.com>. > > According to Laurent Pinchart, R-Car Gen3 reset is handled at the group > level so specifying one reset entry per group is sufficient. For > this reason <&cpg 724> is not listed as a reset for "du.1" as > was the case in an earlier revision of this patch. > > Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au> > --- > v2 [Simon Horman] > - only add one reset entry per group > > v1 [Yoshihiro Kaneko] > --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi > @@ -1001,6 +1001,8 @@ > clocks = <&cpg CPG_MOD 724>, > <&cpg CPG_MOD 723>; > clock-names = "du.0", "du.1"; > + resets = <&cpg 724>; > + reset-names = "du.0"; > vsps = <&vspd0 0 &vspd1 0>; > status = "disabled"; Gr{oetje,eeting}s, Geert
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index 0a344eb55094..ca6aeabd6d04 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi @@ -1001,6 +1001,8 @@ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; clock-names = "du.0", "du.1"; + resets = <&cpg 724>; + reset-names = "du.0"; vsps = <&vspd0 0 &vspd1 0>; status = "disabled";