From patchwork Fri Jul 5 09:56:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 11032785 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BAFE913A4 for ; Fri, 5 Jul 2019 14:38:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A9ECC28AA0 for ; Fri, 5 Jul 2019 14:38:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9D3D028ABA; Fri, 5 Jul 2019 14:38:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 30E2128AA0 for ; Fri, 5 Jul 2019 14:38:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=sPxtnhGuke3nepXVSxxSEPpGwBD015yoKsncjDLZux0=; b=nvg5Crz9MmwegLkayO/mNDg+ml 5lhrtQEeA5K3zQiDmLgX5P4DCeAZtlHSDrcS1UlEtiZwzCsvFHhJbg9pu5zZJ9AUNOlHH0vQUqZqt lMh31mgmx/AqFducjvTRAWAQpyZV6K5LvP4ysNdejJ3v4apfdtrsv+DGzYuHZCycaLo9Wsl9b6yIH sk5i1qrY4OtFbFva3Sus3N59liBZwQVCvCi1IW69TxClY4klX6fdz+z86eRmOSc4ZmBko/Da6uhCC cDDF5P6314IuuT4ZL6w5rfmUjIHIO4QZk7eVb87/Bh4Qpe5f7sjFIQ91GbnzIN01+lyECb3Fgh3AZ ePlSN53Q==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hjPMQ-0000RW-84; Fri, 05 Jul 2019 14:38:50 +0000 Received: from casper.infradead.org ([2001:8b0:10b:1236::1]) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1hjPK8-0006F3-St for linux-arm-kernel@bombadil.infradead.org; Fri, 05 Jul 2019 14:36:28 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=References:In-Reply-To:Message-Id:Date: Subject:Cc:To:From:Sender:Reply-To:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=faqZKqHVPp0Tk/1DLv2CPdWQrsNpQBBUjWduUEJq1qE=; b=JyGztc5pGxiKr7Gtk0uY5rvag XUbWDala+BZgB7fHyOEYhTS/y4s9w6MfChM9oFF2MUc2Wzu2p2beKXrbyGcJ11maWnqx/jpudT6Fk 25rhjg6/58p23KipCt6z0HI5CJna593Y6bUy6BkL0l2XOJFT28Ui88iiZyrI+YQWMTFcGvU2c22Rg X9jmyznAV/Buj4gzA6xvzz8U7qiZZZs6RTcP7xyRN7YraFhh1CGWhPnYm8k0r5DAgiLk8LVwufLJ6 loIUj5SGFC0xGT+C0VkyYekt1pJ40Zcp8/XwzdQiSGKcauAwxGiFGZmxFX0EccM7dTntsr73LfyEN kagCYFkzQ==; Received: from inva021.nxp.com ([92.121.34.21]) by casper.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1hjL85-00024W-Uz for linux-arm-kernel@lists.infradead.org; Fri, 05 Jul 2019 10:07:47 +0000 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id C1108200E78; Fri, 5 Jul 2019 12:07:39 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 41FE5200E86; Fri, 5 Jul 2019 12:07:31 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 3D63B40305; Fri, 5 Jul 2019 18:07:21 +0800 (SGT) From: Hou Zhiqiang To: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhelgaas@google.com, robh+dt@kernel.org, mark.rutland@arm.com, l.subrahmanya@mobiveil.co.in, shawnguo@kernel.org, leoyang.li@nxp.com, lorenzo.pieralisi@arm.com, catalin.marinas@arm.com, will.deacon@arm.com Subject: [PATCHv6 23/28] PCI: mobiveil: Add upper 32-bit CPU base address setup in outbound window Date: Fri, 5 Jul 2019 17:56:51 +0800 Message-Id: <20190705095656.19191-24-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20190705095656.19191-1-Zhiqiang.Hou@nxp.com> References: <20190705095656.19191-1-Zhiqiang.Hou@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190705_110746_019598_EB13CBFC X-CRM114-Status: UNSURE ( 9.28 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Minghuan.Lian@nxp.com, Hou Zhiqiang , Xiaowei.Bao@nxp.com, Mingkai.Hu@nxp.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The current code only setup the lower 32-bit CPU base address in outbound window, it will result in outbound transactions drop on 64-bit platforms. Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver") Signed-off-by: Hou Zhiqiang Reviewed-by: Minghuan Lian Reviewed-by: Subrahmanya Lingappa --- V6: - Splited from #9 of v5 patches, no functional change. drivers/pci/controller/pcie-mobiveil.c | 5 ++++- 1 files changed, 4 insertions(+), 1 deletions(-) diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index 4f50fe6..9382fed 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -70,6 +70,7 @@ #define PAB_EXT_AXI_AMAP_SIZE(win) PAB_EXT_REG_ADDR(0xbaf0, win) +#define PAB_EXT_AXI_AMAP_AXI_WIN(win) PAB_EXT_REG_ADDR(0x80a0, win) #define PAB_AXI_AMAP_AXI_WIN(win) PAB_REG_ADDR(0x0ba4, win) #define AXI_WINDOW_ALIGN_MASK 3 @@ -518,8 +519,10 @@ static void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, * program AXI window base with appropriate value in * PAB_AXI_AMAP_AXI_WIN0 register */ - csr_writel(pcie, cpu_addr & (~AXI_WINDOW_ALIGN_MASK), + csr_writel(pcie, lower_32_bits(cpu_addr) & (~AXI_WINDOW_ALIGN_MASK), PAB_AXI_AMAP_AXI_WIN(win_num)); + csr_writel(pcie, upper_32_bits(cpu_addr), + PAB_EXT_AXI_AMAP_AXI_WIN(win_num)); csr_writel(pcie, lower_32_bits(pci_addr), PAB_AXI_AMAP_PEX_WIN_L(win_num));