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Mon, 29 Jul 2019 07:31:16 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 29 Jul 2019 07:31:15 -0500 Received: from uda0131933.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x6TCV7t3087075; Mon, 29 Jul 2019 07:31:13 -0500 From: Lokesh Vutla To: Nishanth Menon , Tero Kristo , Santosh Shilimkar , Rob Herring Subject: [PATCH v5 2/2] arm64: dts: ti: k3-j721e: Update the power domain cells Date: Mon, 29 Jul 2019 18:00:23 +0530 Message-ID: <20190729123023.32702-3-lokeshvutla@ti.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190729123023.32702-1-lokeshvutla@ti.com> References: <20190729123023.32702-1-lokeshvutla@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190729_053117_940354_004E27C6 X-CRM114-Status: GOOD ( 13.77 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lokesh Vutla , Device Tree Mailing List , Sekhar Nori , Linux ARM Mailing List Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Update the power-domain cells to 2 and mark all devices as exclusive. Main uart 0 is the debug console for processor boards and it is used by different software entities like u-boot, atf, linux simultaneously. So just mark main_uart0 as shared device for common processor board. Reviewed-by: Nishanth Menon Signed-off-by: Lokesh Vutla --- .../dts/ti/k3-j721e-common-proc-board.dts | 4 ++++ arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 20 +++++++++---------- .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 6 +++--- arch/arm64/boot/dts/ti/k3-j721e.dtsi | 1 + 4 files changed, 18 insertions(+), 13 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts index c680123f067c..63b47b839388 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -19,6 +19,10 @@ status = "disabled"; }; +&main_uart0 { + power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>; +}; + &main_uart3 { /* UART not brought out */ status = "disabled"; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index a01308142f77..01661c22c39d 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -119,7 +119,7 @@ interrupts = ; clock-frequency = <48000000>; current-speed = <115200>; - power-domains = <&k3_pds 146>; + power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 146 0>; clock-names = "fclk"; }; @@ -132,7 +132,7 @@ interrupts = ; clock-frequency = <48000000>; current-speed = <115200>; - power-domains = <&k3_pds 278>; + power-domains = <&k3_pds 278 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 278 0>; clock-names = "fclk"; }; @@ -145,7 +145,7 @@ interrupts = ; clock-frequency = <48000000>; current-speed = <115200>; - power-domains = <&k3_pds 279>; + power-domains = <&k3_pds 279 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 279 0>; clock-names = "fclk"; }; @@ -158,7 +158,7 @@ interrupts = ; clock-frequency = <48000000>; current-speed = <115200>; - power-domains = <&k3_pds 280>; + power-domains = <&k3_pds 280 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 280 0>; clock-names = "fclk"; }; @@ -171,7 +171,7 @@ interrupts = ; clock-frequency = <48000000>; current-speed = <115200>; - power-domains = <&k3_pds 281>; + power-domains = <&k3_pds 281 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 281 0>; clock-names = "fclk"; }; @@ -184,7 +184,7 @@ interrupts = ; clock-frequency = <48000000>; current-speed = <115200>; - power-domains = <&k3_pds 282>; + power-domains = <&k3_pds 282 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 282 0>; clock-names = "fclk"; }; @@ -197,7 +197,7 @@ interrupts = ; clock-frequency = <48000000>; current-speed = <115200>; - power-domains = <&k3_pds 283>; + power-domains = <&k3_pds 283 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 283 0>; clock-names = "fclk"; }; @@ -210,7 +210,7 @@ interrupts = ; clock-frequency = <48000000>; current-speed = <115200>; - power-domains = <&k3_pds 284>; + power-domains = <&k3_pds 284 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 284 0>; clock-names = "fclk"; }; @@ -223,7 +223,7 @@ interrupts = ; clock-frequency = <48000000>; current-speed = <115200>; - power-domains = <&k3_pds 285>; + power-domains = <&k3_pds 285 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 285 0>; clock-names = "fclk"; }; @@ -236,7 +236,7 @@ interrupts = ; clock-frequency = <48000000>; current-speed = <115200>; - power-domains = <&k3_pds 286>; + power-domains = <&k3_pds 286 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 286 0>; clock-names = "fclk"; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi index 07b58eeebceb..e616c2481f51 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -20,7 +20,7 @@ k3_pds: power-controller { compatible = "ti,sci-pm-domain"; - #power-domain-cells = <1>; + #power-domain-cells = <2>; }; k3_clks: clocks { @@ -59,7 +59,7 @@ interrupts = ; clock-frequency = <48000000>; current-speed = <115200>; - power-domains = <&k3_pds 287>; + power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 287 0>; clock-names = "fclk"; }; @@ -72,7 +72,7 @@ interrupts = ; clock-frequency = <96000000>; current-speed = <115200>; - power-domains = <&k3_pds 149>; + power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 149 0>; clock-names = "fclk"; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721e.dtsi b/arch/arm64/boot/dts/ti/k3-j721e.dtsi index f8dd74b17bfb..43ea1ba97922 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e.dtsi @@ -8,6 +8,7 @@ #include #include #include +#include / { model = "Texas Instruments K3 J721E SoC";