| Message ID | 20190807003336.28040-1-miles.chen@mediatek.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 2951d5efaf8b67cc4851373de92a91a60899611c |
| Headers | show |
| Series | [v2] arm64: mm: print hexadecimal EC value in mem_abort_decode() | expand |
On 08/07/2019 06:03 AM, Miles Chen wrote: > This change prints the hexadecimal EC value in mem_abort_decode(), > which makes it easier to lookup the corresponding EC in > the ARM Architecture Reference Manual. > > The commit 1f9b8936f36f ("arm64: Decode information from ESR upon mem > faults") prints useful information when memory abort occurs. It would > be easier to lookup "0x25" instead of "DABT" in the document. Then we > can check the corresponding ISS. > > For example: > Current info Document > EC Exception class > "CP15 MCR/MRC" 0x3 "MCR or MRC access to CP15a..." > "ASIMD" 0x7 "Access to SIMD or floating-point..." > "DABT (current EL)" 0x25 "Data Abort taken without..." > ... > > Before: > Unable to handle kernel paging request at virtual address 000000000000c000 > Mem abort info: > ESR = 0x96000046 > Exception class = DABT (current EL), IL = 32 bits > SET = 0, FnV = 0 > EA = 0, S1PTW = 0 > Data abort info: > ISV = 0, ISS = 0x00000046 > CM = 0, WnR = 1 > > After: > Unable to handle kernel paging request at virtual address 000000000000c000 > Mem abort info: > ESR = 0x96000046 > EC = 0x25: DABT (current EL), IL = 32 bits > SET = 0, FnV = 0 > EA = 0, S1PTW = 0 > Data abort info: > ISV = 0, ISS = 0x00000046 > CM = 0, WnR = 1 > > Change since v1: > print "EC" instead of "Exception class" > print EC in fixwidth > > Cc: Mark Rutland <Mark.rutland@arm.com> > Cc: Anshuman Khandual <anshuman.khandual@arm.com> > Cc: James Morse <james.morse@arm.com> > Signed-off-by: Miles Chen <miles.chen@mediatek.com> This version implements the suggestion, hence it should have also contained acked-by tag from Mark from earlier version. Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
On Thu, 2019-08-08 at 11:19 +0530, Anshuman Khandual wrote: > > On 08/07/2019 06:03 AM, Miles Chen wrote: > > This change prints the hexadecimal EC value in mem_abort_decode(), > > which makes it easier to lookup the corresponding EC in > > the ARM Architecture Reference Manual. > > > > The commit 1f9b8936f36f ("arm64: Decode information from ESR upon mem > > faults") prints useful information when memory abort occurs. It would > > be easier to lookup "0x25" instead of "DABT" in the document. Then we > > can check the corresponding ISS. > > > > For example: > > Current info Document > > EC Exception class > > "CP15 MCR/MRC" 0x3 "MCR or MRC access to CP15a..." > > "ASIMD" 0x7 "Access to SIMD or floating-point..." > > "DABT (current EL)" 0x25 "Data Abort taken without..." > > ... > > > > Before: > > Unable to handle kernel paging request at virtual address 000000000000c000 > > Mem abort info: > > ESR = 0x96000046 > > Exception class = DABT (current EL), IL = 32 bits > > SET = 0, FnV = 0 > > EA = 0, S1PTW = 0 > > Data abort info: > > ISV = 0, ISS = 0x00000046 > > CM = 0, WnR = 1 > > > > After: > > Unable to handle kernel paging request at virtual address 000000000000c000 > > Mem abort info: > > ESR = 0x96000046 > > EC = 0x25: DABT (current EL), IL = 32 bits > > SET = 0, FnV = 0 > > EA = 0, S1PTW = 0 > > Data abort info: > > ISV = 0, ISS = 0x00000046 > > CM = 0, WnR = 1 > > > > Change since v1: > > print "EC" instead of "Exception class" > > print EC in fixwidth > > > > Cc: Mark Rutland <Mark.rutland@arm.com> > > Cc: Anshuman Khandual <anshuman.khandual@arm.com> > > Cc: James Morse <james.morse@arm.com> > > Signed-off-by: Miles Chen <miles.chen@mediatek.com> > > This version implements the suggestion, hence it should have > also contained acked-by tag from Mark from earlier version. > No problem. Sorry for not including the tag. I was not sure if I should add the acked-by tag from Mark in patch v2. > Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> If I send patch v3, I should include acked-by tag from Mark and Reviewed-by tag from you, right? Miles
On 08/08/2019 11:31 AM, Miles Chen wrote: > On Thu, 2019-08-08 at 11:19 +0530, Anshuman Khandual wrote: >> >> On 08/07/2019 06:03 AM, Miles Chen wrote: >>> This change prints the hexadecimal EC value in mem_abort_decode(), >>> which makes it easier to lookup the corresponding EC in >>> the ARM Architecture Reference Manual. >>> >>> The commit 1f9b8936f36f ("arm64: Decode information from ESR upon mem >>> faults") prints useful information when memory abort occurs. It would >>> be easier to lookup "0x25" instead of "DABT" in the document. Then we >>> can check the corresponding ISS. >>> >>> For example: >>> Current info Document >>> EC Exception class >>> "CP15 MCR/MRC" 0x3 "MCR or MRC access to CP15a..." >>> "ASIMD" 0x7 "Access to SIMD or floating-point..." >>> "DABT (current EL)" 0x25 "Data Abort taken without..." >>> ... >>> >>> Before: >>> Unable to handle kernel paging request at virtual address 000000000000c000 >>> Mem abort info: >>> ESR = 0x96000046 >>> Exception class = DABT (current EL), IL = 32 bits >>> SET = 0, FnV = 0 >>> EA = 0, S1PTW = 0 >>> Data abort info: >>> ISV = 0, ISS = 0x00000046 >>> CM = 0, WnR = 1 >>> >>> After: >>> Unable to handle kernel paging request at virtual address 000000000000c000 >>> Mem abort info: >>> ESR = 0x96000046 >>> EC = 0x25: DABT (current EL), IL = 32 bits >>> SET = 0, FnV = 0 >>> EA = 0, S1PTW = 0 >>> Data abort info: >>> ISV = 0, ISS = 0x00000046 >>> CM = 0, WnR = 1 >>> >>> Change since v1: >>> print "EC" instead of "Exception class" >>> print EC in fixwidth >>> >>> Cc: Mark Rutland <Mark.rutland@arm.com> >>> Cc: Anshuman Khandual <anshuman.khandual@arm.com> >>> Cc: James Morse <james.morse@arm.com> >>> Signed-off-by: Miles Chen <miles.chen@mediatek.com> >> >> This version implements the suggestion, hence it should have >> also contained acked-by tag from Mark from earlier version. >> > > No problem. Sorry for not including the tag. > I was not sure if I should add the acked-by tag from Mark in patch v2. Yeah because V2 has now implemented the suggestion as required for getting the tag per Mark in V1. > >> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> > > If I send patch v3, I should include acked-by tag from Mark and > Reviewed-by tag from you, right? Right.
On Thu, 2019-08-08 at 11:51 +0530, Anshuman Khandual wrote: > > On 08/08/2019 11:31 AM, Miles Chen wrote: > > On Thu, 2019-08-08 at 11:19 +0530, Anshuman Khandual wrote: > >> > >> On 08/07/2019 06:03 AM, Miles Chen wrote: > >>> This change prints the hexadecimal EC value in mem_abort_decode(), > >>> which makes it easier to lookup the corresponding EC in > >>> the ARM Architecture Reference Manual. > >>> > >>> The commit 1f9b8936f36f ("arm64: Decode information from ESR upon mem > >>> faults") prints useful information when memory abort occurs. It would > >>> be easier to lookup "0x25" instead of "DABT" in the document. Then we > >>> can check the corresponding ISS. > >>> > >>> For example: > >>> Current info Document > >>> EC Exception class > >>> "CP15 MCR/MRC" 0x3 "MCR or MRC access to CP15a..." > >>> "ASIMD" 0x7 "Access to SIMD or floating-point..." > >>> "DABT (current EL)" 0x25 "Data Abort taken without..." > >>> ... > >>> > >>> Before: > >>> Unable to handle kernel paging request at virtual address 000000000000c000 > >>> Mem abort info: > >>> ESR = 0x96000046 > >>> Exception class = DABT (current EL), IL = 32 bits > >>> SET = 0, FnV = 0 > >>> EA = 0, S1PTW = 0 > >>> Data abort info: > >>> ISV = 0, ISS = 0x00000046 > >>> CM = 0, WnR = 1 > >>> > >>> After: > >>> Unable to handle kernel paging request at virtual address 000000000000c000 > >>> Mem abort info: > >>> ESR = 0x96000046 > >>> EC = 0x25: DABT (current EL), IL = 32 bits > >>> SET = 0, FnV = 0 > >>> EA = 0, S1PTW = 0 > >>> Data abort info: > >>> ISV = 0, ISS = 0x00000046 > >>> CM = 0, WnR = 1 > >>> > >>> Change since v1: > >>> print "EC" instead of "Exception class" > >>> print EC in fixwidth > >>> > >>> Cc: Mark Rutland <Mark.rutland@arm.com> > >>> Cc: Anshuman Khandual <anshuman.khandual@arm.com> > >>> Cc: James Morse <james.morse@arm.com> > >>> Signed-off-by: Miles Chen <miles.chen@mediatek.com> > >> > >> This version implements the suggestion, hence it should have > >> also contained acked-by tag from Mark from earlier version. > >> > > > > No problem. Sorry for not including the tag. > > I was not sure if I should add the acked-by tag from Mark in patch v2. > > Yeah because V2 has now implemented the suggestion as required for > getting the tag per Mark in V1. > Understood. thanks for the explanation > > > >> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> > > > > If I send patch v3, I should include acked-by tag from Mark and > > Reviewed-by tag from you, right? > > Right.
diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c index cfd65b63f36f..ad4980a27edb 100644 --- a/arch/arm64/mm/fault.c +++ b/arch/arm64/mm/fault.c @@ -86,8 +86,8 @@ static void mem_abort_decode(unsigned int esr) pr_alert("Mem abort info:\n"); pr_alert(" ESR = 0x%08x\n", esr); - pr_alert(" Exception class = %s, IL = %u bits\n", - esr_get_class_string(esr), + pr_alert(" EC = 0x%02lx: %s, IL = %u bits\n", + ESR_ELx_EC(esr), esr_get_class_string(esr), (esr & ESR_ELx_IL) ? 32 : 16); pr_alert(" SET = %lu, FnV = %lu\n", (esr & ESR_ELx_SET_MASK) >> ESR_ELx_SET_SHIFT,
This change prints the hexadecimal EC value in mem_abort_decode(), which makes it easier to lookup the corresponding EC in the ARM Architecture Reference Manual. The commit 1f9b8936f36f ("arm64: Decode information from ESR upon mem faults") prints useful information when memory abort occurs. It would be easier to lookup "0x25" instead of "DABT" in the document. Then we can check the corresponding ISS. For example: Current info Document EC Exception class "CP15 MCR/MRC" 0x3 "MCR or MRC access to CP15a..." "ASIMD" 0x7 "Access to SIMD or floating-point..." "DABT (current EL)" 0x25 "Data Abort taken without..." ... Before: Unable to handle kernel paging request at virtual address 000000000000c000 Mem abort info: ESR = 0x96000046 Exception class = DABT (current EL), IL = 32 bits SET = 0, FnV = 0 EA = 0, S1PTW = 0 Data abort info: ISV = 0, ISS = 0x00000046 CM = 0, WnR = 1 After: Unable to handle kernel paging request at virtual address 000000000000c000 Mem abort info: ESR = 0x96000046 EC = 0x25: DABT (current EL), IL = 32 bits SET = 0, FnV = 0 EA = 0, S1PTW = 0 Data abort info: ISV = 0, ISS = 0x00000046 CM = 0, WnR = 1 Change since v1: print "EC" instead of "Exception class" print EC in fixwidth Cc: Mark Rutland <Mark.rutland@arm.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: James Morse <james.morse@arm.com> Signed-off-by: Miles Chen <miles.chen@mediatek.com> --- arch/arm64/mm/fault.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)