| Message ID | 20190807155321.9648-3-catalin.marinas@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64 tagged address ABI | expand |
On Wed, Aug 07, 2019 at 04:53:21PM +0100, Catalin Marinas wrote: > From: Vincenzo Frascino <vincenzo.frascino@arm.com> > > On arm64 the TCR_EL1.TBI0 bit has been always enabled hence > the userspace (EL0) is allowed to set a non-zero value in the > top byte but the resulting pointers are not allowed at the > user-kernel syscall ABI boundary. > > With the relaxed ABI proposed in this set, it is now possible to pass > tagged pointers to the syscalls, when these pointers are in memory > ranges obtained by an anonymous (MAP_ANONYMOUS) mmap(). > > Relax the requirements described in tagged-pointers.rst to be compliant > with the behaviours guaranteed by the ARM64 Tagged Address ABI. > > Cc: Will Deacon <will.deacon@arm.com> > Cc: Andrey Konovalov <andreyknvl@google.com> > Cc: Szabolcs Nagy <szabolcs.nagy@arm.com> > Cc: Kevin Brodsky <kevin.brodsky@arm.com> > Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com> > [catalin.marinas@arm.com: minor tweaks] > Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> > --- > Documentation/arm64/tagged-pointers.rst | 23 ++++++++++++++++------- > 1 file changed, 16 insertions(+), 7 deletions(-) > > diff --git a/Documentation/arm64/tagged-pointers.rst b/Documentation/arm64/tagged-pointers.rst > index 2acdec3ebbeb..82a3eff71a70 100644 > --- a/Documentation/arm64/tagged-pointers.rst > +++ b/Documentation/arm64/tagged-pointers.rst > @@ -20,7 +20,8 @@ Passing tagged addresses to the kernel > -------------------------------------- > > All interpretation of userspace memory addresses by the kernel assumes > -an address tag of 0x00. > +an address tag of 0x00, unless the application enables the AArch64 > +Tagged Address ABI explicitly. I think we should have the link to Documentation/arm64/tagged-address-abi.rst here so people see it when it's first referenced. > +The AArch64 Tagged Address ABI description and the guarantees it > +provides can be found in: Documentation/arm64/tagged-address-abi.rst. Then this sentence can be dropped. Will
diff --git a/Documentation/arm64/tagged-pointers.rst b/Documentation/arm64/tagged-pointers.rst index 2acdec3ebbeb..82a3eff71a70 100644 --- a/Documentation/arm64/tagged-pointers.rst +++ b/Documentation/arm64/tagged-pointers.rst @@ -20,7 +20,8 @@ Passing tagged addresses to the kernel -------------------------------------- All interpretation of userspace memory addresses by the kernel assumes -an address tag of 0x00. +an address tag of 0x00, unless the application enables the AArch64 +Tagged Address ABI explicitly. This includes, but is not limited to, addresses found in: @@ -33,18 +34,23 @@ This includes, but is not limited to, addresses found in: - the frame pointer (x29) and frame records, e.g. when interpreting them to generate a backtrace or call graph. -Using non-zero address tags in any of these locations may result in an -error code being returned, a (fatal) signal being raised, or other modes -of failure. +Using non-zero address tags in any of these locations when the +userspace application did not enable the AArch64 Tagged Address ABI may +result in an error code being returned, a (fatal) signal being raised, +or other modes of failure. -For these reasons, passing non-zero address tags to the kernel via -system calls is forbidden, and using a non-zero address tag for sp is -strongly discouraged. +For these reasons, when the AArch64 Tagged Address ABI is disabled, +passing non-zero address tags to the kernel via system calls is +forbidden, and using a non-zero address tag for sp is strongly +discouraged. Programs maintaining a frame pointer and frame records that use non-zero address tags may suffer impaired or inaccurate debug and profiling visibility. +The AArch64 Tagged Address ABI description and the guarantees it +provides can be found in: Documentation/arm64/tagged-address-abi.rst. + Preserving tags --------------- @@ -59,6 +65,9 @@ be preserved. The architecture prevents the use of a tagged PC, so the upper byte will be set to a sign-extension of bit 55 on exception return. +This behaviour is preserved when the AArch64 Tagged Address ABI is +enabled. + Other considerations --------------------