| Message ID | 20190809093158.7969-16-lkundrak@v3.sk (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Initial support for Marvell MMP3 SoC | expand |
On 8/9/19 2:31 AM, Lubomir Rintel wrote: > Used to bring up the second core on MMP3. > > Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> > --- > arch/arm/mach-mmp/Makefile | 3 +++ > arch/arm/mach-mmp/platsmp.c | 32 ++++++++++++++++++++++++++++++++ > 2 files changed, 35 insertions(+) > create mode 100644 arch/arm/mach-mmp/platsmp.c > > diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile > index 322c1c97dc900..7b3a7f979eece 100644 > --- a/arch/arm/mach-mmp/Makefile > +++ b/arch/arm/mach-mmp/Makefile > @@ -22,6 +22,9 @@ ifeq ($(CONFIG_PM),y) > obj-$(CONFIG_CPU_PXA910) += pm-pxa910.o > obj-$(CONFIG_CPU_MMP2) += pm-mmp2.o > endif > +ifeq ($(CONFIG_SMP),y) > +obj-$(CONFIG_MACH_MMP3_DT) += platsmp.o > +endif > > # board support > obj-$(CONFIG_MACH_ASPENITE) += aspenite.o > diff --git a/arch/arm/mach-mmp/platsmp.c b/arch/arm/mach-mmp/platsmp.c > new file mode 100644 > index 0000000000000..255df640b5bc1 > --- /dev/null > +++ b/arch/arm/mach-mmp/platsmp.c > @@ -0,0 +1,32 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later > +/* > + * Copyright (C) 2019 Lubomir Rintel <lkundrak@v3.sk> > + */ > +#include <linux/io.h> > +#include <asm/smp_scu.h> > +#include <asm/smp.h> > +#include "addr-map.h" > + > +#define SW_BRANCH_VIRT_ADDR CIU_REG(0x24) > + > +static int mmp3_boot_secondary(unsigned int cpu, struct task_struct *idle) > +{ > + /* > + * Apparently, the boot ROM on the second core spins on this > + * register becoming non-zero and then jumps to the address written > + * there. No IPIs involved. > + */ > + __raw_writel(virt_to_phys(secondary_startup), SW_BRANCH_VIRT_ADDR); You would want to use __pa_symbol() here (which is equivalent, but will avoid barfing on you with CONFIG_DEBUG_VIRTUAL).
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile index 322c1c97dc900..7b3a7f979eece 100644 --- a/arch/arm/mach-mmp/Makefile +++ b/arch/arm/mach-mmp/Makefile @@ -22,6 +22,9 @@ ifeq ($(CONFIG_PM),y) obj-$(CONFIG_CPU_PXA910) += pm-pxa910.o obj-$(CONFIG_CPU_MMP2) += pm-mmp2.o endif +ifeq ($(CONFIG_SMP),y) +obj-$(CONFIG_MACH_MMP3_DT) += platsmp.o +endif # board support obj-$(CONFIG_MACH_ASPENITE) += aspenite.o diff --git a/arch/arm/mach-mmp/platsmp.c b/arch/arm/mach-mmp/platsmp.c new file mode 100644 index 0000000000000..255df640b5bc1 --- /dev/null +++ b/arch/arm/mach-mmp/platsmp.c @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2019 Lubomir Rintel <lkundrak@v3.sk> + */ +#include <linux/io.h> +#include <asm/smp_scu.h> +#include <asm/smp.h> +#include "addr-map.h" + +#define SW_BRANCH_VIRT_ADDR CIU_REG(0x24) + +static int mmp3_boot_secondary(unsigned int cpu, struct task_struct *idle) +{ + /* + * Apparently, the boot ROM on the second core spins on this + * register becoming non-zero and then jumps to the address written + * there. No IPIs involved. + */ + __raw_writel(virt_to_phys(secondary_startup), SW_BRANCH_VIRT_ADDR); + return 0; +} + +static void mmp3_smp_prepare_cpus(unsigned int max_cpus) +{ + scu_enable(SCU_VIRT_BASE); +} + +static const struct smp_operations mmp3_smp_ops __initconst = { + .smp_prepare_cpus = mmp3_smp_prepare_cpus, + .smp_boot_secondary = mmp3_boot_secondary, +}; +CPU_METHOD_OF_DECLARE(mmp3_smp, "marvell,mmp3-smp", &mmp3_smp_ops);
Used to bring up the second core on MMP3. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> --- arch/arm/mach-mmp/Makefile | 3 +++ arch/arm/mach-mmp/platsmp.c | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 35 insertions(+) create mode 100644 arch/arm/mach-mmp/platsmp.c