| Message ID | 20190813072731.4558-1-linus.walleij@linaro.org (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | c08b598410559c7006f2cea04ba80646eb214212 |
| Headers | show |
| Series | ARM: dts: nomadik: Set up the CS GPIO right | expand |
diff --git a/arch/arm/boot/dts/ste-nomadik-nhk15.dts b/arch/arm/boot/dts/ste-nomadik-nhk15.dts index 04066f9cb8a3..41ed21a4fdc1 100644 --- a/arch/arm/boot/dts/ste-nomadik-nhk15.dts +++ b/arch/arm/boot/dts/ste-nomadik-nhk15.dts @@ -212,13 +212,7 @@ */ gpio-sck = <&gpio0 5 GPIO_ACTIVE_HIGH>; gpio-mosi = <&gpio0 4 GPIO_ACTIVE_HIGH>; - /* - * It's not actually active high, but the frameworks assume - * the polarity of the passed-in GPIO is "normal" (active - * high) then actively drives the line low to select the - * chip. - */ - cs-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; + cs-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; num-chipselects = <1>; /*
Now that the SPI GPIO driver knows how to handle these chip select GPIOs and we get nasty messages about the core having to enforce active low on the GPIO, fix this up by actually requesting the CS GPIO line as active low. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- ARM SoC folks: please apply this directly for v5.4, I do not plan to send more Nomadik patches this merge window. --- arch/arm/boot/dts/ste-nomadik-nhk15.dts | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-)