Message ID | 20190819205720.24457-5-mike.leach@linaro.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | coresight: etm4x: Fixes and updates for sysfs API | expand |
Hi Mike, On Mon, Aug 19, 2019 at 09:57:16PM +0100, Mike Leach wrote: > Fixes the following issues when using the ETMv4 start-stop logic. > > 1) Setting a start or a stop address should not automatically set the > start-stop status to 'on'. The value set by the user in 'mode' must > be respected or start instances could be missed. > 2) Missing API for controlling TRCVIPCSSCTLR - start stop control by > PE comparators. > 3) Default ETM configuration sets a trace all range, and correctly sets > the start-stop status bit. This was not being correctly reflected in > the 'mode' parameter. > > Signed-off-by: Mike Leach <mike.leach@linaro.org> > --- > .../coresight/coresight-etm4x-sysfs.c | 39 +++++++++++++++++-- > drivers/hwtracing/coresight/coresight-etm4x.c | 1 + > 2 files changed, 36 insertions(+), 4 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c > index 7eab5d7d0b62..3bcc260c9e55 100644 > --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c > +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c > @@ -217,6 +217,7 @@ static ssize_t reset_store(struct device *dev, > > /* No start-stop filtering for ViewInst */ > config->vissctlr = 0x0; > + config->vipcssctlr = 0x0; > > /* Disable seq events */ > for (i = 0; i < drvdata->nrseqstate-1; i++) > @@ -1059,8 +1060,6 @@ static ssize_t addr_start_store(struct device *dev, > config->addr_val[idx] = (u64)val; > config->addr_type[idx] = ETM_ADDR_TYPE_START; > config->vissctlr |= BIT(idx); > - /* SSSTATUS, bit[9] - turn on start/stop logic */ > - config->vinst_ctrl |= BIT(9); > spin_unlock(&drvdata->spinlock); > return size; > } > @@ -1116,8 +1115,6 @@ static ssize_t addr_stop_store(struct device *dev, > config->addr_val[idx] = (u64)val; > config->addr_type[idx] = ETM_ADDR_TYPE_STOP; > config->vissctlr |= BIT(idx + 16); > - /* SSSTATUS, bit[9] - turn on start/stop logic */ > - config->vinst_ctrl |= BIT(9); > spin_unlock(&drvdata->spinlock); > return size; > } > @@ -1271,6 +1268,39 @@ static ssize_t addr_exlevel_s_ns_store(struct device *dev, > } > static DEVICE_ATTR_RW(addr_exlevel_s_ns); > > +static ssize_t vinst_pe_cmp_start_stop_show(struct device *dev, > + struct device_attribute *attr, > + char *buf) > +{ > + unsigned long val; > + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); > + struct etmv4_config *config = &drvdata->config; > + > + if (!drvdata->nr_pe_cmp) > + return -EINVAL; > + val = config->vipcssctlr; > + return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); > +} > +static ssize_t vinst_pe_cmp_start_stop_store(struct device *dev, > + struct device_attribute *attr, > + const char *buf, size_t size) > +{ > + unsigned long val; > + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); > + struct etmv4_config *config = &drvdata->config; > + > + if (kstrtoul(buf, 16, &val)) > + return -EINVAL; > + if (!drvdata->nr_pe_cmp) > + return -EINVAL; > + > + spin_lock(&drvdata->spinlock); > + config->vipcssctlr = val; > + spin_unlock(&drvdata->spinlock); I don't find the code to set 'config->vipcssctlr' into hardware register TRCVIPCSSCTLR. And based on the register definition, here we also should clamp the value for START/STOP? Thanks, Leo Yan > + return size; > +} > +static DEVICE_ATTR_RW(vinst_pe_cmp_start_stop); > + > static ssize_t seq_idx_show(struct device *dev, > struct device_attribute *attr, > char *buf) > @@ -2077,6 +2107,7 @@ static struct attribute *coresight_etmv4_attrs[] = { > &dev_attr_addr_ctxtype.attr, > &dev_attr_addr_context.attr, > &dev_attr_addr_exlevel_s_ns.attr, > + &dev_attr_vinst_pe_cmp_start_stop.attr, > &dev_attr_seq_idx.attr, > &dev_attr_seq_state.attr, > &dev_attr_seq_event.attr, > diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c > index 52b8876de157..d8b078d0cc7f 100644 > --- a/drivers/hwtracing/coresight/coresight-etm4x.c > +++ b/drivers/hwtracing/coresight/coresight-etm4x.c > @@ -868,6 +868,7 @@ static void etm4_set_default_filter(struct etmv4_config *config) > * in the started state > */ > config->vinst_ctrl |= BIT(9); > + config->mode |= ETM_MODE_VIEWINST_STARTSTOP; > > /* No start-stop filtering for ViewInst */ > config->vissctlr = 0x0; > -- > 2.17.1 > > _______________________________________________ > CoreSight mailing list > CoreSight@lists.linaro.org > https://lists.linaro.org/mailman/listinfo/coresight
Hi Leo, On Wed, 28 Aug 2019 at 04:18, Leo Yan <leo.yan@linaro.org> wrote: > > Hi Mike, > > On Mon, Aug 19, 2019 at 09:57:16PM +0100, Mike Leach wrote: > > Fixes the following issues when using the ETMv4 start-stop logic. > > > > 1) Setting a start or a stop address should not automatically set the > > start-stop status to 'on'. The value set by the user in 'mode' must > > be respected or start instances could be missed. > > 2) Missing API for controlling TRCVIPCSSCTLR - start stop control by > > PE comparators. > > 3) Default ETM configuration sets a trace all range, and correctly sets > > the start-stop status bit. This was not being correctly reflected in > > the 'mode' parameter. > > > > Signed-off-by: Mike Leach <mike.leach@linaro.org> > > --- > > .../coresight/coresight-etm4x-sysfs.c | 39 +++++++++++++++++-- > > drivers/hwtracing/coresight/coresight-etm4x.c | 1 + > > 2 files changed, 36 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c > > index 7eab5d7d0b62..3bcc260c9e55 100644 > > --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c > > +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c > > @@ -217,6 +217,7 @@ static ssize_t reset_store(struct device *dev, > > > > /* No start-stop filtering for ViewInst */ > > config->vissctlr = 0x0; > > + config->vipcssctlr = 0x0; > > > > /* Disable seq events */ > > for (i = 0; i < drvdata->nrseqstate-1; i++) > > @@ -1059,8 +1060,6 @@ static ssize_t addr_start_store(struct device *dev, > > config->addr_val[idx] = (u64)val; > > config->addr_type[idx] = ETM_ADDR_TYPE_START; > > config->vissctlr |= BIT(idx); > > - /* SSSTATUS, bit[9] - turn on start/stop logic */ > > - config->vinst_ctrl |= BIT(9); > > spin_unlock(&drvdata->spinlock); > > return size; > > } > > @@ -1116,8 +1115,6 @@ static ssize_t addr_stop_store(struct device *dev, > > config->addr_val[idx] = (u64)val; > > config->addr_type[idx] = ETM_ADDR_TYPE_STOP; > > config->vissctlr |= BIT(idx + 16); > > - /* SSSTATUS, bit[9] - turn on start/stop logic */ > > - config->vinst_ctrl |= BIT(9); > > spin_unlock(&drvdata->spinlock); > > return size; > > } > > @@ -1271,6 +1268,39 @@ static ssize_t addr_exlevel_s_ns_store(struct device *dev, > > } > > static DEVICE_ATTR_RW(addr_exlevel_s_ns); > > > > +static ssize_t vinst_pe_cmp_start_stop_show(struct device *dev, > > + struct device_attribute *attr, > > + char *buf) > > +{ > > + unsigned long val; > > + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); > > + struct etmv4_config *config = &drvdata->config; > > + > > + if (!drvdata->nr_pe_cmp) > > + return -EINVAL; > > + val = config->vipcssctlr; > > + return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); > > +} > > +static ssize_t vinst_pe_cmp_start_stop_store(struct device *dev, > > + struct device_attribute *attr, > > + const char *buf, size_t size) > > +{ > > + unsigned long val; > > + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); > > + struct etmv4_config *config = &drvdata->config; > > + > > + if (kstrtoul(buf, 16, &val)) > > + return -EINVAL; > > + if (!drvdata->nr_pe_cmp) > > + return -EINVAL; > > + > > + spin_lock(&drvdata->spinlock); > > + config->vipcssctlr = val; > > + spin_unlock(&drvdata->spinlock); > > I don't find the code to set 'config->vipcssctlr' into hardware register > TRCVIPCSSCTLR. > This is in coresight-etm4x.c, etm4_enable_hw(), ll 126-127 > And based on the register definition, here we also should clamp the > value for START/STOP? > Unimplemented fields are RES0 - there is no issue with writing these - they will remain RES0. (ETM arch spec, section 7.2.1) Thanks Mike > Thanks, > Leo Yan > > > + return size; > > +} > > +static DEVICE_ATTR_RW(vinst_pe_cmp_start_stop); > > + > > static ssize_t seq_idx_show(struct device *dev, > > struct device_attribute *attr, > > char *buf) > > @@ -2077,6 +2107,7 @@ static struct attribute *coresight_etmv4_attrs[] = { > > &dev_attr_addr_ctxtype.attr, > > &dev_attr_addr_context.attr, > > &dev_attr_addr_exlevel_s_ns.attr, > > + &dev_attr_vinst_pe_cmp_start_stop.attr, > > &dev_attr_seq_idx.attr, > > &dev_attr_seq_state.attr, > > &dev_attr_seq_event.attr, > > diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c > > index 52b8876de157..d8b078d0cc7f 100644 > > --- a/drivers/hwtracing/coresight/coresight-etm4x.c > > +++ b/drivers/hwtracing/coresight/coresight-etm4x.c > > @@ -868,6 +868,7 @@ static void etm4_set_default_filter(struct etmv4_config *config) > > * in the started state > > */ > > config->vinst_ctrl |= BIT(9); > > + config->mode |= ETM_MODE_VIEWINST_STARTSTOP; > > > > /* No start-stop filtering for ViewInst */ > > config->vissctlr = 0x0; > > -- > > 2.17.1 > > > > _______________________________________________ > > CoreSight mailing list > > CoreSight@lists.linaro.org > > https://lists.linaro.org/mailman/listinfo/coresight
diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c index 7eab5d7d0b62..3bcc260c9e55 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c @@ -217,6 +217,7 @@ static ssize_t reset_store(struct device *dev, /* No start-stop filtering for ViewInst */ config->vissctlr = 0x0; + config->vipcssctlr = 0x0; /* Disable seq events */ for (i = 0; i < drvdata->nrseqstate-1; i++) @@ -1059,8 +1060,6 @@ static ssize_t addr_start_store(struct device *dev, config->addr_val[idx] = (u64)val; config->addr_type[idx] = ETM_ADDR_TYPE_START; config->vissctlr |= BIT(idx); - /* SSSTATUS, bit[9] - turn on start/stop logic */ - config->vinst_ctrl |= BIT(9); spin_unlock(&drvdata->spinlock); return size; } @@ -1116,8 +1115,6 @@ static ssize_t addr_stop_store(struct device *dev, config->addr_val[idx] = (u64)val; config->addr_type[idx] = ETM_ADDR_TYPE_STOP; config->vissctlr |= BIT(idx + 16); - /* SSSTATUS, bit[9] - turn on start/stop logic */ - config->vinst_ctrl |= BIT(9); spin_unlock(&drvdata->spinlock); return size; } @@ -1271,6 +1268,39 @@ static ssize_t addr_exlevel_s_ns_store(struct device *dev, } static DEVICE_ATTR_RW(addr_exlevel_s_ns); +static ssize_t vinst_pe_cmp_start_stop_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + unsigned long val; + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); + struct etmv4_config *config = &drvdata->config; + + if (!drvdata->nr_pe_cmp) + return -EINVAL; + val = config->vipcssctlr; + return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); +} +static ssize_t vinst_pe_cmp_start_stop_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + unsigned long val; + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); + struct etmv4_config *config = &drvdata->config; + + if (kstrtoul(buf, 16, &val)) + return -EINVAL; + if (!drvdata->nr_pe_cmp) + return -EINVAL; + + spin_lock(&drvdata->spinlock); + config->vipcssctlr = val; + spin_unlock(&drvdata->spinlock); + return size; +} +static DEVICE_ATTR_RW(vinst_pe_cmp_start_stop); + static ssize_t seq_idx_show(struct device *dev, struct device_attribute *attr, char *buf) @@ -2077,6 +2107,7 @@ static struct attribute *coresight_etmv4_attrs[] = { &dev_attr_addr_ctxtype.attr, &dev_attr_addr_context.attr, &dev_attr_addr_exlevel_s_ns.attr, + &dev_attr_vinst_pe_cmp_start_stop.attr, &dev_attr_seq_idx.attr, &dev_attr_seq_state.attr, &dev_attr_seq_event.attr, diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c index 52b8876de157..d8b078d0cc7f 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.c +++ b/drivers/hwtracing/coresight/coresight-etm4x.c @@ -868,6 +868,7 @@ static void etm4_set_default_filter(struct etmv4_config *config) * in the started state */ config->vinst_ctrl |= BIT(9); + config->mode |= ETM_MODE_VIEWINST_STARTSTOP; /* No start-stop filtering for ViewInst */ config->vissctlr = 0x0;
Fixes the following issues when using the ETMv4 start-stop logic. 1) Setting a start or a stop address should not automatically set the start-stop status to 'on'. The value set by the user in 'mode' must be respected or start instances could be missed. 2) Missing API for controlling TRCVIPCSSCTLR - start stop control by PE comparators. 3) Default ETM configuration sets a trace all range, and correctly sets the start-stop status bit. This was not being correctly reflected in the 'mode' parameter. Signed-off-by: Mike Leach <mike.leach@linaro.org> --- .../coresight/coresight-etm4x-sysfs.c | 39 +++++++++++++++++-- drivers/hwtracing/coresight/coresight-etm4x.c | 1 + 2 files changed, 36 insertions(+), 4 deletions(-)