From patchwork Thu Aug 22 09:26:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lubomir Rintel X-Patchwork-Id: 11108893 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B3550912 for ; Thu, 22 Aug 2019 09:34:03 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 910C5233A0 for ; Thu, 22 Aug 2019 09:34:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="LKkEIvSd" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 910C5233A0 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=v3.sk Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=7Z6QXPJRRuV4rOTKn8GNycMoBOaxnik5rEa1i0sgf1M=; b=LKkEIvSdHL86c8 3KbrpDVPrPZneVkKZ9e+XiyJ7r/4jT3h6vENC3k8yCfNnt1lDpz1QQYTRn4g3bTwuHozA35LKcYeG elF0H6FnP75n+FFMy6qmNJtXNXyE7FK1MONMphwz7WVADxdoPP7F2S8NxQZC36HMdoqMBQTee5bTY 5KUci45eaRbtH5q2mjxRYklevLgwKfG/d9zM4phVJN+WQDZUfroK/ZzPqAXZk8uQJDb74BbgAesS4 u1paYxaME3Vn8myaH77f6Dmd03hiwr2kvdMSzi1T8p0+w17CiMc3OYUk3coFayt/WAjaVZubTdQgj vRLXaGaZnqc4CxMnNl4Q==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1i0jTm-0006oV-Tp; Thu, 22 Aug 2019 09:34:03 +0000 Received: from shell.v3.sk ([90.176.6.54]) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1i0jTF-00068v-TN for linux-arm-kernel@lists.infradead.org; Thu, 22 Aug 2019 09:33:31 +0000 Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id 8C53ED7562; Thu, 22 Aug 2019 11:33:27 +0200 (CEST) Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id cszP_4J_skTE; Thu, 22 Aug 2019 11:33:07 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id 0FB58D7574; Thu, 22 Aug 2019 11:27:26 +0200 (CEST) X-Virus-Scanned: amavisd-new at zimbra.v3.sk Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id UvxyHw--d7gz; Thu, 22 Aug 2019 11:26:48 +0200 (CEST) Received: from belphegor.brq.redhat.com (nat-pool-brq-t.redhat.com [213.175.37.10]) by zimbra.v3.sk (Postfix) with ESMTPSA id 865E3D7559; Thu, 22 Aug 2019 11:26:47 +0200 (CEST) From: Lubomir Rintel To: Olof Johansson Subject: [PATCH v2 04/20] dt-bindings: mrvl, intc: Add a MMP3 interrupt controller Date: Thu, 22 Aug 2019 11:26:27 +0200 Message-Id: <20190822092643.593488-5-lkundrak@v3.sk> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190822092643.593488-1-lkundrak@v3.sk> References: <20190822092643.593488-1-lkundrak@v3.sk> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190822_023330_134092_A0CBC8E4 X-CRM114-Status: GOOD ( 10.90 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Jason Cooper , Stephen Boyd , Marc Zyngier , Michael Turquette , Russell King , Kishon Vijay Abraham I , Lubomir Rintel , Rob Herring , linux-arm-kernel@lists.infradead.org, Thomas Gleixner , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Similar to MMP2 one, but has an extra range for the other core. The muxes stay the same. Signed-off-by: Lubomir Rintel Reviewed-by: Rob Herring --- Changes since v1: - Reformat the compatible property documentation to higlight the valid combinations - Drop an unneeded mmp3-intc example .../bindings/interrupt-controller/mrvl,intc.txt | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt b/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt index 608fee15a4cfc..a0ed02725a9d7 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt @@ -1,13 +1,17 @@ * Marvell MMP Interrupt controller Required properties: -- compatible : Should be "mrvl,mmp-intc", "mrvl,mmp2-intc" or - "mrvl,mmp2-mux-intc" +- compatible : Should be + "mrvl,mmp-intc" on Marvel MMP, + "mrvl,mmp2-intc" along with "mrvl,mmp2-mux-intc" on MMP2 or + "marvell,mmp3-intc" with "mrvl,mmp2-mux-intc" on MMP3 - reg : Address and length of the register set of the interrupt controller. If the interrupt controller is intc, address and length means the range - of the whole interrupt controller. If the interrupt controller is mux-intc, - address and length means one register. Since address of mux-intc is in the - range of intc. mux-intc is secondary interrupt controller. + of the whole interrupt controller. The "marvell,mmp3-intc" controller + also has a secondary range for the second CPU core. If the interrupt + controller is mux-intc, address and length means one register. Since + address of mux-intc is in the range of intc. mux-intc is secondary + interrupt controller. - reg-names : Name of the register set of the interrupt controller. It's only required in mux-intc interrupt controller. - interrupts : Should be the port interrupt shared by mux interrupts. It's