[V6,2/3] Documentation: admin-guide: perf: add i.MX8 ddr pmu user doc

Commit Message

Joakim Zhang Aug. 26, 2019, 7:34 a.m. UTC

Add i.MX8 ddr pmu user doc.

ChangeLog:
V1 -> V4:
	* new add in V4.
V4 -> V5:
	* no change.
V5 -> V6:
	* change the event name

Signed-off-by: Joakim Zhang <[e-mail]>
---
 Documentation/admin-guide/perf/imx-ddr.rst | 30 ++++++++++++++++++++++
 1 file changed, 30 insertions(+)
 create mode 100644 Documentation/admin-guide/perf/imx-ddr.rst

Patch

diff --git a/Documentation/admin-guide/perf/imx-ddr.rst b/Documentation/admin-guide/perf/imx-ddr.rst
new file mode 100644
index 000000000000..071d38b74d9d
--- /dev/null
+++ b/Documentation/admin-guide/perf/imx-ddr.rst
@@ -0,0 +1,30 @@ 
+====================================================
+Freescale i.MX8 DDR Performance Monitoring Unit (PMU)
+====================================================
+
+There are no performance counters inside the DRAM controller, so performance
+signals are brought out to the edge of the controller where a set of 4 x 32 bit
+counters is implemented. This is controlled by the Performance log on parameter
+which causes a large number of PERF signals to be generated.
+
+Selection of the value for each counter is done via the config registiers. There
+is one register for each counter. Counter 0 is special in that it always counts
+“time” and when expired causes a lock on itself and the other counters and an
+interrupt ie enable of counter 0 is a global function.
+
+The "format" directory describes format of the config (event ID) and config1
+(AXI ID filter) fields of the perf_event_attr structure, see /sys/bus/event_source/
+devices/imx8_ddr0/format/. The "events" directory describes the events types
+hardware supported that can be used with perf tool, see /sys/bus/event_source/
+devices/imx8_ddr0/events/.
+
+AXI ID filter is only used by CSV modes 0x41 (axid-read) and 0x42 (axid-write)
+to count reading or writing matches filter setting. User should specify this two
+events with the same AXI ID filter value if want to count at the same time, as
+this filter register is shared between counters.
+
+Example for perf tool use::
+
+        perf stat -a -e imx8_ddr0/cycles/ sleep 1
+        perf stat -a -e imx8_ddr0/read/,imx8_ddr0/write/ sleep 1
+        perf stat -a -e imx8_ddr0/axid-read,axi_id=0xMMMMDDDD/,imx8_ddr0/axid-write,axi_id=0xMMMMDDDD/ sleep 1