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Wed, 11 Sep 2019 04:46:55 -0700 (PDT) From: Corentin Labbe To: davem@davemloft.net, herbert@gondor.apana.org.au, mripard@kernel.org, wens@csie.org Subject: [PATCH 2/2] crypto: sun4i-ss: enable pm_runtime Date: Wed, 11 Sep 2019 13:46:50 +0200 Message-Id: <20190911114650.20567-3-clabbe.montjoie@gmail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190911114650.20567-1-clabbe.montjoie@gmail.com> References: <20190911114650.20567-1-clabbe.montjoie@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190911_044657_518719_64E2294C X-CRM114-Status: GOOD ( 14.90 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:342 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (clabbe.montjoie[at]gmail.com) 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-sunxi@googlegroups.com, Corentin Labbe , linux-crypto@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch enables power management on the Security System. Signed-off-by: Corentin Labbe --- drivers/crypto/sunxi-ss/sun4i-ss-cipher.c | 5 +++ drivers/crypto/sunxi-ss/sun4i-ss-core.c | 42 ++++++++++++++++++++++- 2 files changed, 46 insertions(+), 1 deletion(-) diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c b/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c index fa4b1b47822e..1fedec9e83b0 100644 --- a/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c +++ b/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c @@ -10,6 +10,8 @@ * * You could find the datasheet in Documentation/arm/sunxi.rst */ + +#include #include "sun4i-ss.h" static int noinline_for_stack sun4i_ss_opti_poll(struct skcipher_request *areq) @@ -497,13 +499,16 @@ int sun4i_ss_cipher_init(struct crypto_tfm *tfm) return PTR_ERR(op->fallback_tfm); } + pm_runtime_get_sync(op->ss->dev); return 0; } void sun4i_ss_cipher_exit(struct crypto_tfm *tfm) { struct sun4i_tfm_ctx *op = crypto_tfm_ctx(tfm); + crypto_free_sync_skcipher(op->fallback_tfm); + pm_runtime_put_sync(op->ss->dev); } /* check and set the AES key, prepare the mode to be used */ diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-core.c b/drivers/crypto/sunxi-ss/sun4i-ss-core.c index 2c9ff01dddfc..5e6e1a308f60 100644 --- a/drivers/crypto/sunxi-ss/sun4i-ss-core.c +++ b/drivers/crypto/sunxi-ss/sun4i-ss-core.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -258,6 +259,37 @@ static int sun4i_ss_enable(struct sun4i_ss_ctx *ss) return err; } +#ifdef CONFIG_PM +static int sun4i_ss_pm_suspend(struct device *dev) +{ + struct sun4i_ss_ctx *ss = dev_get_drvdata(dev); + + sun4i_ss_disable(ss); + return 0; +} + +static int sun4i_ss_pm_resume(struct device *dev) +{ + struct sun4i_ss_ctx *ss = dev_get_drvdata(dev); + + return sun4i_ss_enable(ss); +} +#endif + +const struct dev_pm_ops sun4i_ss_pm_ops = { + SET_RUNTIME_PM_OPS(sun4i_ss_pm_suspend, sun4i_ss_pm_resume, NULL) +}; + +static void sun4i_ss_pm_init(struct sun4i_ss_ctx *ss) +{ + pm_runtime_use_autosuspend(ss->dev); + pm_runtime_set_autosuspend_delay(ss->dev, 1000); + + pm_runtime_get_noresume(ss->dev); + pm_runtime_set_active(ss->dev); + pm_runtime_enable(ss->dev); +} + static int sun4i_ss_probe(struct platform_device *pdev) { u32 v; @@ -357,9 +389,12 @@ static int sun4i_ss_probe(struct platform_device *pdev) writel(0, ss->base + SS_CTL); ss->dev = &pdev->dev; + platform_set_drvdata(pdev, ss); spin_lock_init(&ss->slock); + sun4i_ss_pm_init(ss); + for (i = 0; i < ARRAY_SIZE(ss_algs); i++) { ss_algs[i].ss = ss; switch (ss_algs[i].type) { @@ -388,7 +423,8 @@ static int sun4i_ss_probe(struct platform_device *pdev) break; } } - platform_set_drvdata(pdev, ss); + + pm_runtime_put_sync(ss->dev); return 0; error_alg: i--; @@ -405,6 +441,7 @@ static int sun4i_ss_probe(struct platform_device *pdev) break; } } + pm_runtime_disable(ss->dev); error_enable: sun4i_ss_disable(ss); return err; @@ -429,6 +466,8 @@ static int sun4i_ss_remove(struct platform_device *pdev) } } + pm_runtime_disable(ss->dev); + writel(0, ss->base + SS_CTL); sun4i_ss_disable(ss); return 0; @@ -445,6 +484,7 @@ static struct platform_driver sun4i_ss_driver = { .remove = sun4i_ss_remove, .driver = { .name = "sun4i-ss", + .pm = &sun4i_ss_pm_ops, .of_match_table = a20ss_crypto_of_match_table, }, };