| Message ID | 20190915135444.11066-1-linus.walleij@linaro.org (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 2a7326caab479ca257c4b9bd67db42d1d49079bf |
| Headers | show |
| Series | ARM: dts: dir685: Drop spi-cpol from the display | expand |
On Sun, Sep 15, 2019 at 3:55 PM Linus Walleij <linus.walleij@linaro.org> wrote: > > The D-Link DIR-685 had its clock polarity set as active > low using the special SPI "spi-cpol" property. > > This is not correct: the datasheet clearly states: > "Fix SCL to GND level when not in use" which is > indicative that this line is active high. > > After a recent fix making the GPIO-based SPI driver > force the clock line de-asserted at the beginning of > each SPI transaction this reared its ugly head: now > de-asserted was taken to mean the line should be > driven high, but it should be driven low. > > Fix this up in the DTS file and the display works again. > > Cc: Mark Brown <broonie@kernel.org> > Fixes: 2922d1cc1696 ("spi: gpio: Add SPI_MASTER_GPIO_SS flag") > Signed-off-by: Linus Walleij <linus.walleij@linaro.org> > --- > ARM SoC folks: please apply this directly to fixes if > you're OK with the patch. As the merge window is now open, I just applied this to the 'arm/late' branch. Arnd
diff --git a/arch/arm/boot/dts/gemini-dlink-dir-685.dts b/arch/arm/boot/dts/gemini-dlink-dir-685.dts index bfaa2de63a10..e2030ba16512 100644 --- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts +++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts @@ -72,7 +72,6 @@ reg = <0>; /* 50 ns min period = 20 MHz */ spi-max-frequency = <20000000>; - spi-cpol; /* Clock active low */ vcc-supply = <&vdisp>; iovcc-supply = <&vdisp>; vci-supply = <&vdisp>;
The D-Link DIR-685 had its clock polarity set as active low using the special SPI "spi-cpol" property. This is not correct: the datasheet clearly states: "Fix SCL to GND level when not in use" which is indicative that this line is active high. After a recent fix making the GPIO-based SPI driver force the clock line de-asserted at the beginning of each SPI transaction this reared its ugly head: now de-asserted was taken to mean the line should be driven high, but it should be driven low. Fix this up in the DTS file and the display works again. Cc: Mark Brown <broonie@kernel.org> Fixes: 2922d1cc1696 ("spi: gpio: Add SPI_MASTER_GPIO_SS flag") Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- ARM SoC folks: please apply this directly to fixes if you're OK with the patch. --- arch/arm/boot/dts/gemini-dlink-dir-685.dts | 1 - 1 file changed, 1 deletion(-)