Message ID | 20190926232820.27676-4-chris.packham@alliedtelesis.co.nz (mailing list archive) |
---|---|
State | Mainlined |
Commit | 90b9dc96940cb8a23f2aac307a7cb3e036d79c47 |
Headers | show |
Series | ARM: dts: SDRAM and L2 cache EDAC for Armada SoCs | expand |
diff --git a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi index 267d0c178e55..654648b05c7c 100644 --- a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi +++ b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi @@ -90,7 +90,7 @@ }; internal-regs { - sdramc@1400 { + sdramc: sdramc@1400 { compatible = "marvell,armada-xp-sdram-controller"; reg = <0x1400 0x500>; }; diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index ee15c77d3689..6c19984d668e 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -36,7 +36,7 @@ }; internal-regs { - sdramc@1400 { + sdramc: sdramc@1400 { compatible = "marvell,armada-xp-sdram-controller"; reg = <0x1400 0x500>; };
Add the label "sdramc" to the sdram-controller nodes for the Armada-XP and 98dx3236 SoCs. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> --- arch/arm/boot/dts/armada-xp-98dx3236.dtsi | 2 +- arch/arm/boot/dts/armada-xp.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)