| Message ID | 20191028214914.3465156-1-megous@megous.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | e690053e97e7a9c968df9a97cef9089dfa8e6a44 |
| Headers | show |
| Series | ARM: sunxi: Fix CPU powerdown on A83T | expand |
On Tue, Oct 29, 2019 at 5:49 AM Ondrej Jirman <megous@megous.com> wrote: > > PRCM_PWROFF_GATING_REG has CPU0 at bit 4 on A83T. So without this > patch, instead of gating the CPU0, the whole cluster was power gated, > when shutting down first CPU in the cluster. > > Fixes: 6961275e72a8c1 ("ARM: sun8i: smp: Add support for A83T") > Signed-off-by: Ondrej Jirman <megous@megous.com> > Cc: stable@vger.kernel.org Acked-by: Chen-Yu Tsai <wens@csie.org> Though I distinctly remember the BSP had some code dealing with chip revisions in which the two bits were reversed. :(
On Tue, Oct 29, 2019 at 09:09:40AM +0800, Chen-Yu Tsai wrote: > On Tue, Oct 29, 2019 at 5:49 AM Ondrej Jirman <megous@megous.com> wrote: > > > > PRCM_PWROFF_GATING_REG has CPU0 at bit 4 on A83T. So without this > > patch, instead of gating the CPU0, the whole cluster was power gated, > > when shutting down first CPU in the cluster. > > > > Fixes: 6961275e72a8c1 ("ARM: sun8i: smp: Add support for A83T") > > Signed-off-by: Ondrej Jirman <megous@megous.com> > > Cc: stable@vger.kernel.org > > Acked-by: Chen-Yu Tsai <wens@csie.org> > > Though I distinctly remember the BSP had some code dealing with chip > revisions in which the two bits were reversed. :( Actually, it's a bit more complicated. There's a special check in BSP code (grep for SUN8IW6P1_REV_A) that instead of power gating, just holds the core in reset for that revision. regards, o.
On Mon, Oct 28, 2019 at 10:49:14PM +0100, Ondrej Jirman wrote: > PRCM_PWROFF_GATING_REG has CPU0 at bit 4 on A83T. So without this > patch, instead of gating the CPU0, the whole cluster was power gated, > when shutting down first CPU in the cluster. > > Fixes: 6961275e72a8c1 ("ARM: sun8i: smp: Add support for A83T") > Signed-off-by: Ondrej Jirman <megous@megous.com> > Cc: stable@vger.kernel.org Applied, thanks Maxime
diff --git a/arch/arm/mach-sunxi/mc_smp.c b/arch/arm/mach-sunxi/mc_smp.c index 239084cf8192..26cbce135338 100644 --- a/arch/arm/mach-sunxi/mc_smp.c +++ b/arch/arm/mach-sunxi/mc_smp.c @@ -481,14 +481,18 @@ static void sunxi_mc_smp_cpu_die(unsigned int l_cpu) static int sunxi_cpu_powerdown(unsigned int cpu, unsigned int cluster) { u32 reg; + int gating_bit = cpu; pr_debug("%s: cluster %u cpu %u\n", __func__, cluster, cpu); if (cpu >= SUNXI_CPUS_PER_CLUSTER || cluster >= SUNXI_NR_CLUSTERS) return -EINVAL; + if (is_a83t && cpu == 0) + gating_bit = 4; + /* gate processor power */ reg = readl(prcm_base + PRCM_PWROFF_GATING_REG(cluster)); - reg |= PRCM_PWROFF_GATING_REG_CORE(cpu); + reg |= PRCM_PWROFF_GATING_REG_CORE(gating_bit); writel(reg, prcm_base + PRCM_PWROFF_GATING_REG(cluster)); udelay(20);
PRCM_PWROFF_GATING_REG has CPU0 at bit 4 on A83T. So without this patch, instead of gating the CPU0, the whole cluster was power gated, when shutting down first CPU in the cluster. Fixes: 6961275e72a8c1 ("ARM: sun8i: smp: Add support for A83T") Signed-off-by: Ondrej Jirman <megous@megous.com> Cc: stable@vger.kernel.org --- arch/arm/mach-sunxi/mc_smp.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)