| Message ID | 20191107141339.6079-7-alcooperx@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | phy: usb: Updates to Broadcom STB USB PHY driver | expand |
On Thu, Nov 07, 2019 at 09:13:32AM -0500, Al Cooper wrote: > Add support for bcm7216 and bcm7211 > > Signed-off-by: Al Cooper <alcooperx@gmail.com> > --- > .../bindings/phy/brcm,brcmstb-usb-phy.txt | 69 +++++++++++++++---- > 1 file changed, 56 insertions(+), 13 deletions(-) > > diff --git a/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.txt b/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.txt > index 24a0d06acd1d..14184cec15dc 100644 > --- a/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.txt > +++ b/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.txt > @@ -1,30 +1,49 @@ > Broadcom STB USB PHY > > Required properties: > - - compatible: brcm,brcmstb-usb-phy > - - reg: two offset and length pairs. > - The first pair specifies a manditory set of memory mapped > - registers used for general control of the PHY. > - The second pair specifies optional registers used by some of > - the SoCs that support USB 3.x > - - #phy-cells: Shall be 1 as it expects one argument for setting > - the type of the PHY. Possible values are: > - - PHY_TYPE_USB2 for USB1.1/2.0 PHY > - - PHY_TYPE_USB3 for USB3.x PHY > +- compatible: should be one of > + "brcm,brcmstb-usb-phy" > + "brcm,bcm7216-usb-phy" > + "brcm,bcm7211-usb-phy" > + > +- reg and reg-names properties requirements are specific to the > + compatible string. > + "brcm,brcmstb-usb-phy": > + - reg: 1 or 2 offset and length pairs. One for the base CTRL registers > + and an optional pair for systems with USB 3.x support > + - reg-names: not specified > + "brcm,bcm7216-usb-phy": > + - reg: 3 offset and length pairs for CTRL, XHCI_EC and XHCI_GBL > + registers > + - reg-names: "ctrl", "xhci_ec", "xhci_gbl" > + "brcm,bcm7211-usb-phy": > + - reg: 5 offset and length pairs for CTRL, XHCI_EC, XHCI_GBL, > + USB_PHY and USB_MDIO registers and an optional pair > + for the BDC registers > + - reg-names: "ctrl", "xhci_ec", "xhci_gbl", "usb_phy", "usb_mdio", "bdc_ec" > + > +- #phy-cells: Shall be 1 as it expects one argument for setting > + the type of the PHY. Possible values are: > + - PHY_TYPE_USB2 for USB1.1/2.0 PHY > + - PHY_TYPE_USB3 for USB3.x PHY > > Optional Properties: > - clocks : clock phandles. > - clock-names: String, clock name. > +- interrupts: wake interrupt > +- interrupt-names: "wake" If a wakeup source, the standard name is 'wakeup'. > - brcm,ipp: Boolean, Invert Port Power. > Possible values are: 0 (Don't invert), 1 (Invert) > - brcm,ioc: Boolean, Invert Over Current detection. > Possible values are: 0 (Don't invert), 1 (Invert) > -NOTE: one or both of the following two properties must be set > -- brcm,has-xhci: Boolean indicating the phy has an XHCI phy. > -- brcm,has-eohci: Boolean indicating the phy has an EHCI/OHCI phy. > - dr_mode: String, PHY Device mode. > Possible values are: "host", "peripheral ", "drd" or "typec-pd" > If this property is not defined, the phy will default to "host" mode. > +- syscon-piarbctl: phandle to syscon for handling config registers Needs vendor prefix. > +NOTE: one or both of the following two properties must be set > +- brcm,has-xhci: Boolean indicating the phy has an XHCI phy. > +- brcm,has-eohci: Boolean indicating the phy has an EHCI/OHCI phy. > + > > Example: > > @@ -41,3 +60,27 @@ usbphy_0: usb-phy@f0470200 { > clocks = <&usb20>, <&usb30>; > clock-names = "sw_usb", "sw_usb3"; > }; > + > +usb-phy@29f0200 { > + reg = <0x29f0200 0x200>, > + <0x29c0880 0x30>, > + <0x29cc100 0x534>, > + <0x2808000 0x24>, > + <0x2980080 0x8>; > + reg-names = "ctrl", > + "xhci_ec", > + "xhci_gbl", > + "usb_phy", > + "usb_mdio"; > + brcm,ioc = <0x0>; > + brcm,ipp = <0x0>; > + compatible = "brcm,bcm7211-usb-phy"; > + interrupts = <0x30>; > + interrupt-parent = <&vpu_intr1_nosec_intc>; > + interrupt-names = "wake"; > + #phy-cells = <0x1>; > + brcm,has-xhci; > + syscon-piarbctl = <&syscon_piarbctl>; > + clocks = <&scmi_clk 256>; > + clock-names = "sw_usb"; > +}; > -- > 2.17.1 >
diff --git a/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.txt b/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.txt index 24a0d06acd1d..14184cec15dc 100644 --- a/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.txt +++ b/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.txt @@ -1,30 +1,49 @@ Broadcom STB USB PHY Required properties: - - compatible: brcm,brcmstb-usb-phy - - reg: two offset and length pairs. - The first pair specifies a manditory set of memory mapped - registers used for general control of the PHY. - The second pair specifies optional registers used by some of - the SoCs that support USB 3.x - - #phy-cells: Shall be 1 as it expects one argument for setting - the type of the PHY. Possible values are: - - PHY_TYPE_USB2 for USB1.1/2.0 PHY - - PHY_TYPE_USB3 for USB3.x PHY +- compatible: should be one of + "brcm,brcmstb-usb-phy" + "brcm,bcm7216-usb-phy" + "brcm,bcm7211-usb-phy" + +- reg and reg-names properties requirements are specific to the + compatible string. + "brcm,brcmstb-usb-phy": + - reg: 1 or 2 offset and length pairs. One for the base CTRL registers + and an optional pair for systems with USB 3.x support + - reg-names: not specified + "brcm,bcm7216-usb-phy": + - reg: 3 offset and length pairs for CTRL, XHCI_EC and XHCI_GBL + registers + - reg-names: "ctrl", "xhci_ec", "xhci_gbl" + "brcm,bcm7211-usb-phy": + - reg: 5 offset and length pairs for CTRL, XHCI_EC, XHCI_GBL, + USB_PHY and USB_MDIO registers and an optional pair + for the BDC registers + - reg-names: "ctrl", "xhci_ec", "xhci_gbl", "usb_phy", "usb_mdio", "bdc_ec" + +- #phy-cells: Shall be 1 as it expects one argument for setting + the type of the PHY. Possible values are: + - PHY_TYPE_USB2 for USB1.1/2.0 PHY + - PHY_TYPE_USB3 for USB3.x PHY Optional Properties: - clocks : clock phandles. - clock-names: String, clock name. +- interrupts: wake interrupt +- interrupt-names: "wake" - brcm,ipp: Boolean, Invert Port Power. Possible values are: 0 (Don't invert), 1 (Invert) - brcm,ioc: Boolean, Invert Over Current detection. Possible values are: 0 (Don't invert), 1 (Invert) -NOTE: one or both of the following two properties must be set -- brcm,has-xhci: Boolean indicating the phy has an XHCI phy. -- brcm,has-eohci: Boolean indicating the phy has an EHCI/OHCI phy. - dr_mode: String, PHY Device mode. Possible values are: "host", "peripheral ", "drd" or "typec-pd" If this property is not defined, the phy will default to "host" mode. +- syscon-piarbctl: phandle to syscon for handling config registers +NOTE: one or both of the following two properties must be set +- brcm,has-xhci: Boolean indicating the phy has an XHCI phy. +- brcm,has-eohci: Boolean indicating the phy has an EHCI/OHCI phy. + Example: @@ -41,3 +60,27 @@ usbphy_0: usb-phy@f0470200 { clocks = <&usb20>, <&usb30>; clock-names = "sw_usb", "sw_usb3"; }; + +usb-phy@29f0200 { + reg = <0x29f0200 0x200>, + <0x29c0880 0x30>, + <0x29cc100 0x534>, + <0x2808000 0x24>, + <0x2980080 0x8>; + reg-names = "ctrl", + "xhci_ec", + "xhci_gbl", + "usb_phy", + "usb_mdio"; + brcm,ioc = <0x0>; + brcm,ipp = <0x0>; + compatible = "brcm,bcm7211-usb-phy"; + interrupts = <0x30>; + interrupt-parent = <&vpu_intr1_nosec_intc>; + interrupt-names = "wake"; + #phy-cells = <0x1>; + brcm,has-xhci; + syscon-piarbctl = <&syscon_piarbctl>; + clocks = <&scmi_clk 256>; + clock-names = "sw_usb"; +};
Add support for bcm7216 and bcm7211 Signed-off-by: Al Cooper <alcooperx@gmail.com> --- .../bindings/phy/brcm,brcmstb-usb-phy.txt | 69 +++++++++++++++---- 1 file changed, 56 insertions(+), 13 deletions(-)