diff mbox series

[4/7] spi: zynq-qspi: Enhance the Linear CFG bit definitions

Message ID 20191108105920.19014-5-miquel.raynal@bootlin.com (mailing list archive)
State New, archived
Headers show
Series spi: zynq-qspi: Clarify and fix the chip selection | expand

Commit Message

Miquel Raynal Nov. 8, 2019, 10:59 a.m. UTC 
Using masks makes sense when manipulating fields of several bits. When
only one bit is involved, let's just use the BIT() macro to define the
actual bit instead of the needed shift to obtain it and use a better
naming.

These definitions will be used in a following change.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 drivers/spi/spi-zynq-qspi.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/drivers/spi/spi-zynq-qspi.c b/drivers/spi/spi-zynq-qspi.c
index 11a484aa3186..34c24b2ad3cf 100644
--- a/drivers/spi/spi-zynq-qspi.c
+++ b/drivers/spi/spi-zynq-qspi.c
@@ -99,9 +99,9 @@ 
  * It is named Linear Configuration but it controls other modes when not in
  * linear mode also.
  */
-#define ZYNQ_QSPI_LCFG_TWO_MEM_MASK	0x40000000 /* LQSPI Two memories Mask */
-#define ZYNQ_QSPI_LCFG_SEP_BUS_MASK	0x20000000 /* LQSPI Separate bus Mask */
-#define ZYNQ_QSPI_LCFG_U_PAGE_MASK	0x10000000 /* LQSPI Upper Page Mask */
+#define ZYNQ_QSPI_LCFG_TWO_MEM		BIT(30) /* LQSPI Two memories */
+#define ZYNQ_QSPI_LCFG_SEP_BUS		BIT(29) /* LQSPI Separate bus */
+#define ZYNQ_QSPI_LCFG_U_PAGE		BIT(28) /* LQSPI Upper Page */
 
 #define ZYNQ_QSPI_LCFG_DUMMY_SHIFT	8