From patchwork Tue Nov 12 15:59:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Saenz Julienne X-Patchwork-Id: 11239725 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D05C215AB for ; Tue, 12 Nov 2019 16:00:22 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 958362067B for ; Tue, 12 Nov 2019 16:00:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="rHbTyxfv" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 958362067B Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=bKo19i5CNPxL2nNr3uar38ydAV16EhNHArw6HA3ld7k=; b=rHbTyxfvTBXpvy jEgkQ+c1EXlkBu4gg9anUlX4jzpcD5QpiWXwxjwU0fgDVG7w545rGQvBuAYRHo5rnAqMi8f4X0lNx rdyEjjp1p3/Pc4AmQM6zqRKGcJxL0h/U9LXmwpguNWFbfJwAzPucViM6sHrMgnqIFxc9fT36FuQNY sQAyDhSkKvbJZfvqzTrWgV9q+mVPHusQRDHI3Rs7Z3+beFM4a1+ceWAl9wixVLjBBe3qoM8Jp03BV e8N28x+5XZQ1AmVSnVQA/qP+i/HK5GiOnF1O7ib7D5JRmZ1f4wDGKY7qZ/0y6JqNJOVwUjKjmZ2dG +PiUJgUOktXn2SX/q9rA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1iUYab-0007R5-CW; Tue, 12 Nov 2019 16:00:21 +0000 Received: from mx2.suse.de ([195.135.220.15] helo=mx1.suse.de) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1iUYZz-0005YF-31; Tue, 12 Nov 2019 15:59:45 +0000 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id C7FB6B3BB; Tue, 12 Nov 2019 15:59:41 +0000 (UTC) From: Nicolas Saenz Julienne To: andrew.murray@arm.com, maz@kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Mark Rutland , Eric Anholt , Stefan Wahren Subject: [PATCH v2 3/6] ARM: dts: bcm2711: Enable PCIe controller Date: Tue, 12 Nov 2019 16:59:22 +0100 Message-Id: <20191112155926.16476-4-nsaenzjulienne@suse.de> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191112155926.16476-1-nsaenzjulienne@suse.de> References: <20191112155926.16476-1-nsaenzjulienne@suse.de> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191112_075943_274301_C97D76D0 X-CRM114-Status: GOOD ( 12.66 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [195.135.220.15 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, f.fainelli@gmail.com, phil@raspberrypi.org, jeremy.linton@arm.com, mbrugger@suse.com, bcm-kernel-feedback-list@broadcom.com, linux-rpi-kernel@lists.infradead.org, james.quinlan@broadcom.com, Nicolas Saenz Julienne Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This enables bcm2711's PCIe bus, which is hardwired to a VIA Technologies XHCI USB 3.0 controller. Signed-off-by: Nicolas Saenz Julienne --- Changes since v1: - remove linux,pci-domain --- arch/arm/boot/dts/bcm2711.dtsi | 46 ++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi index 667658497898..664fefb2011e 100644 --- a/arch/arm/boot/dts/bcm2711.dtsi +++ b/arch/arm/boot/dts/bcm2711.dtsi @@ -288,6 +288,52 @@ IRQ_TYPE_LEVEL_LOW)>, arm,cpu-registers-not-fw-configured; }; + scb { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + + ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>, + <0x6 0x00000000 0x6 0x00000000 0x40000000>; + + pcie_0: pcie@7d500000 { + compatible = "brcm,bcm2711-pcie"; + reg = <0x0 0x7d500000 0x9310>; + msi-controller; + msi-parent = <&pcie_0>; + #address-cells = <3>; + #interrupt-cells = <1>; + #size-cells = <2>; + brcm,enable-ssc; + interrupts = , + ; + interrupt-names = "pcie", "msi"; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 + IRQ_TYPE_LEVEL_HIGH + 0 0 0 2 &gicv2 GIC_SPI 144 + IRQ_TYPE_LEVEL_HIGH + 0 0 0 3 &gicv2 GIC_SPI 145 + IRQ_TYPE_LEVEL_HIGH + 0 0 0 4 &gicv2 GIC_SPI 146 + IRQ_TYPE_LEVEL_HIGH>; + + ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 + 0x0 0x04000000>; + /* + * The wrapper around the PCIe block has a bug + * preventing it from accessing beyond the first 3GB of + * memory. As the bus DMA mask is rounded up to the + * closest power of two of the dma-range size, we're + * forced to set the limit at 2GB. This can be + * harmlessly changed in the future once the DMA code + * handles non power of two DMA limits. + */ + dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 + 0x0 0x80000000>; + }; + }; + cpus: cpus { #address-cells = <1>; #size-cells = <0>;