@@ -35,6 +35,7 @@ config ARM
select ARCH_USE_CMPXCHG_LOCKREF
select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
select ARCH_WANT_IPC_PARSE_VERSION
+ select ARCH_USE_COMMON_SMP_STOP
select BINFMT_FLAT_ARGVP_ENVP_ON_STACK
select BUILDTIME_EXTABLE_SORT if MMU
select CLONE_BACKWARDS
@@ -598,6 +598,8 @@ static void ipi_cpu_stop(unsigned int cpu)
}
set_cpu_online(cpu, false);
+ /* ensure all writes are globally visible before cpu parks */
+ wmb();
local_fiq_disable();
local_irq_disable();
@@ -705,23 +707,9 @@ void smp_send_reschedule(int cpu)
smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
}
-void smp_send_stop(void)
+void arch_smp_stop_call(cpumask_t *cpus, unsigned int __unused)
{
- unsigned long timeout;
- struct cpumask mask;
-
- cpumask_copy(&mask, cpu_online_mask);
- cpumask_clear_cpu(smp_processor_id(), &mask);
- if (!cpumask_empty(&mask))
- smp_cross_call(&mask, IPI_CPU_STOP);
-
- /* Wait up to one second for other CPUs to stop */
- timeout = USEC_PER_SEC;
- while (num_online_cpus() > 1 && timeout--)
- udelay(1);
-
- if (num_online_cpus() > 1)
- pr_warn("SMP: failed to stop secondary CPUs\n");
+ smp_cross_call(cpus, IPI_CPU_STOP);
}
/* In case panic() and panic() called at the same time on CPU1 and CPU2,
@@ -735,6 +723,8 @@ void panic_smp_self_stop(void)
pr_debug("CPU %u will stop doing anything useful since another CPU has paniced\n",
smp_processor_id());
set_cpu_online(smp_processor_id(), false);
+ /* ensure all writes visible before parking */
+ wmb();
while (1)
cpu_relax();
}
Make arm use the generic SMP-stop logic provided by common code unified smp_send_stop() function. Signed-off-by: Cristian Marussi <cristian.marussi@arm.com> --- v2 --> v3 - conflicts - added missing barriers --- arch/arm/Kconfig | 1 + arch/arm/kernel/smp.c | 22 ++++++---------------- 2 files changed, 7 insertions(+), 16 deletions(-)