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[81.140.166.164]) by smtp.gmail.com with ESMTPSA id e18sm8643101wrr.95.2020.01.09.08.06.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Jan 2020 08:06:24 -0800 (PST) From: Julien Thierry To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [RFC v5 28/57] objtool: arm64: Decode branch instructions with PC relative immediates Date: Thu, 9 Jan 2020 16:02:31 +0000 Message-Id: <20200109160300.26150-29-jthierry@redhat.com> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200109160300.26150-1-jthierry@redhat.com> References: <20200109160300.26150-1-jthierry@redhat.com> MIME-Version: 1.0 X-MC-Unique: vdmisrpVM3qaXn4RHFGepA-1 X-Mimecast-Spam-Score: 0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200109_080632_425352_4A514D43 X-CRM114-Status: GOOD ( 10.50 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [207.211.31.81 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.0 DKIMWL_WL_HIGH DKIMwl.org - Whitelisted High sender X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Julien Thierry , peterz@infradead.org, catalin.marinas@arm.com, raphael.gault@arm.com, jpoimboe@redhat.com, will@kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Decode instructions that cause a jump in the execution flow, adding an immediate value to the current instruction counter. Suggested-by: Raphael Gault Signed-off-by: Julien Thierry --- tools/objtool/arch/arm64/decode.c | 79 +++++++++++++++++++ .../objtool/arch/arm64/include/insn_decode.h | 11 +++ 2 files changed, 90 insertions(+) diff --git a/tools/objtool/arch/arm64/decode.c b/tools/objtool/arch/arm64/decode.c index 5eba83c5d5bc..7986ded8b622 100644 --- a/tools/objtool/arch/arm64/decode.c +++ b/tools/objtool/arch/arm64/decode.c @@ -424,6 +424,26 @@ static struct aarch64_insn_decoder br_sys_decoder[] = { .value = 0b1100000000000000000000, .decode_func = arm_decode_except_gen, }, + { + .mask = 0b1111000000000000000000, + .value = 0b0100000000000000000000, + .decode_func = arm_decode_br_cond_imm, + }, + { + .mask = 0b0110000000000000000000, + .value = 0b0000000000000000000000, + .decode_func = arm_decode_br_uncond_imm, + }, + { + .mask = 0b0111000000000000000000, + .value = 0b0010000000000000000000, + .decode_func = arm_decode_br_comp_imm, + }, + { + .mask = 0b0111000000000000000000, + .value = 0b0011000000000000000000, + .decode_func = arm_decode_br_tst_imm, + }, }; int arm_decode_br_sys(u32 instr, enum insn_type *type, @@ -575,3 +595,62 @@ int arm_decode_except_gen(u32 instr, enum insn_type *type, #undef INSN_DCPS2 #undef INSN_DCPS3 } + +int arm_decode_br_cond_imm(u32 instr, enum insn_type *type, + unsigned long *immediate, struct list_head *ops_list) +{ + unsigned char o0 = 0, o1 = 0; + u32 imm19; + + o0 = EXTRACT_BIT(instr, 4); + o1 = EXTRACT_BIT(instr, 24); + imm19 = (instr >> 5) & ONES(19); + + *immediate = SIGN_EXTEND(imm19 << 2, 19); + + if ((o1 << 1) | o0) + return arm_decode_unknown(instr, type, immediate, ops_list); + + *type = INSN_JUMP_CONDITIONAL; + + return 0; +} + +int arm_decode_br_uncond_imm(u32 instr, enum insn_type *type, + unsigned long *immediate, + struct list_head *ops_list) +{ + unsigned char decode_field = 0; + u32 imm26 = 0; + + decode_field = EXTRACT_BIT(instr, 31); + imm26 = instr & ONES(26); + + *immediate = SIGN_EXTEND(imm26 << 2, 28); + if (decode_field == 0) + *type = INSN_JUMP_UNCONDITIONAL; + else + *type = INSN_CALL; + + return 0; +} + +int arm_decode_br_comp_imm(u32 instr, enum insn_type *type, + unsigned long *immediate, struct list_head *ops_list) +{ + u32 imm19 = (instr >> 5) & ONES(19); + + *immediate = SIGN_EXTEND(imm19 << 2, 21); + *type = INSN_JUMP_CONDITIONAL; + return 0; +} + +int arm_decode_br_tst_imm(u32 instr, enum insn_type *type, + unsigned long *immediate, struct list_head *ops_list) +{ + u32 imm14 = (instr >> 5) & ONES(14); + + *immediate = SIGN_EXTEND(imm14 << 2, 16); + *type = INSN_JUMP_CONDITIONAL; + return 0; +} diff --git a/tools/objtool/arch/arm64/include/insn_decode.h b/tools/objtool/arch/arm64/include/insn_decode.h index a55dcbfcfed2..ceb80a58c548 100644 --- a/tools/objtool/arch/arm64/include/insn_decode.h +++ b/tools/objtool/arch/arm64/include/insn_decode.h @@ -72,4 +72,15 @@ int arm_decode_system_regs(u32 instr, enum insn_type *type, struct list_head *ops_list); int arm_decode_except_gen(u32 instr, enum insn_type *type, unsigned long *immediate, struct list_head *ops_list); +int arm_decode_br_uncond_imm(u32 instr, enum insn_type *type, + unsigned long *immediate, + struct list_head *ops_list); +int arm_decode_br_comp_imm(u32 instr, enum insn_type *type, + unsigned long *immediate, + struct list_head *ops_list); +int arm_decode_br_tst_imm(u32 instr, enum insn_type *type, + unsigned long *immediate, struct list_head *ops_list); +int arm_decode_br_cond_imm(u32 instr, enum insn_type *type, + unsigned long *immediate, + struct list_head *ops_list); #endif /* _ARM_INSN_DECODE_H */