| Message ID | 20200219130712.28108-1-festevam@gmail.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 8cdff3241f63da30b0228d8719cf04b72d671f7d |
| Headers | show |
| Series | ARM: dts: imx6sx-softing-vining-2000: Enable PCI support | expand |
On 2/19/20 2:07 PM, Fabio Estevam wrote: > Add PCI support. > > Since this board has an active high PCI reset line, pass the > 'reset-gpio-active-high' property. > > Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de> Tested-by: Marek Vasut <marex@denx.de> Thanks.
On Wed, Feb 19, 2020 at 10:07:12AM -0300, Fabio Estevam wrote: > Add PCI support. > > Since this board has an active high PCI reset line, pass the > 'reset-gpio-active-high' property. > > Signed-off-by: Fabio Estevam <festevam@gmail.com> Applied, thanks.
diff --git a/arch/arm/boot/dts/imx6sx-softing-vining-2000.dts b/arch/arm/boot/dts/imx6sx-softing-vining-2000.dts index 28563f21024e..a82d50837028 100644 --- a/arch/arm/boot/dts/imx6sx-softing-vining-2000.dts +++ b/arch/arm/boot/dts/imx6sx-softing-vining-2000.dts @@ -352,6 +352,12 @@ >; }; + pinctrl_pcie: pciegrp { + fsl,pins = < + MX6SX_PAD_NAND_DATA02__GPIO4_IO_6 0x10b0 + >; + }; + pinctrl_pwm1: pwm1grp-1 { fsl,pins = < /* blue LED */ @@ -490,6 +496,14 @@ }; }; +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie>; + reset-gpio = <&gpio4 6 GPIO_ACTIVE_HIGH>; + reset-gpio-active-high; + status = "okay"; +}; + &pwm1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>;
Add PCI support. Since this board has an active high PCI reset line, pass the 'reset-gpio-active-high' property. Signed-off-by: Fabio Estevam <festevam@gmail.com> --- Hi, I don't have access to this board. I noticed it while working on imx6sx PCI support in U-Boot. Marek, maybe you could help reviewing/testing it. Thanks arch/arm/boot/dts/imx6sx-softing-vining-2000.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+)