Message ID | 20200222214039.209426-1-megous@megous.com (mailing list archive) |
---|---|
State | Mainlined |
Commit | 87bf7a5fba68b0ab3b34fbb06b5aa6cbb9dcc9a1 |
Headers | show |
Series | ARM: dts: sun8i-a83t: Add thermal trip points/cooling maps | expand |
Hi, On Sun, Feb 23, 2020 at 5:40 AM Ondrej Jirman <megous@megous.com> wrote: > > This enables passive cooling by down-regulating CPU voltage > and frequency. Please state for the record how the trip points were derived. Were they from the BSP? Or the user manual? ChenYu
Hello, On Sun, Feb 23, 2020 at 11:29:07AM +0800, Chen-Yu Tsai wrote: > Hi, > > On Sun, Feb 23, 2020 at 5:40 AM Ondrej Jirman <megous@megous.com> wrote: > > > > This enables passive cooling by down-regulating CPU voltage > > and frequency. > > Please state for the record how the trip points were derived. Were they from > the BSP? Or the user manual? The values are taken from the BSP for A83T: https://megous.com/git/linux/tree/drivers/thermal/sunxi-temperature.c?h=a83t-3.4-bsp-tbs-a711#n747 The datasheet only mentions recommended Ta (ambient operating temperature) range -20 to +70°C. So die voltages will be larger than that. I guess that roughly matches the BSP values. regards, o. > ChenYu
On Sun, Feb 23, 2020 at 11:10:50AM +0100, Ondřej Jirman wrote: > Hello, > > On Sun, Feb 23, 2020 at 11:29:07AM +0800, Chen-Yu Tsai wrote: > > Hi, > > > > On Sun, Feb 23, 2020 at 5:40 AM Ondrej Jirman <megous@megous.com> wrote: > > > > > > This enables passive cooling by down-regulating CPU voltage > > > and frequency. > > > > Please state for the record how the trip points were derived. Were they from > > the BSP? Or the user manual? > > The values are taken from the BSP for A83T: > > https://megous.com/git/linux/tree/drivers/thermal/sunxi-temperature.c?h=a83t-3.4-bsp-tbs-a711#n747 > > The datasheet only mentions recommended Ta (ambient operating temperature) range > -20 to +70°C. So die voltages will be larger than that. I guess that roughly > matches the BSP values. Can you put that in the commit log? Thanks! Maxime
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index 74ac7ee9383cf..53c2b6a836f27 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -72,7 +72,7 @@ cpu0: cpu@0 { #cooling-cells = <2>; }; - cpu@1 { + cpu1: cpu@1 { compatible = "arm,cortex-a7"; device_type = "cpu"; clocks = <&ccu CLK_C0CPUX>; @@ -83,7 +83,7 @@ cpu@1 { #cooling-cells = <2>; }; - cpu@2 { + cpu2: cpu@2 { compatible = "arm,cortex-a7"; device_type = "cpu"; clocks = <&ccu CLK_C0CPUX>; @@ -94,7 +94,7 @@ cpu@2 { #cooling-cells = <2>; }; - cpu@3 { + cpu3: cpu@3 { compatible = "arm,cortex-a7"; device_type = "cpu"; clocks = <&ccu CLK_C0CPUX>; @@ -116,7 +116,7 @@ cpu100: cpu@100 { #cooling-cells = <2>; }; - cpu@101 { + cpu101: cpu@101 { compatible = "arm,cortex-a7"; device_type = "cpu"; clocks = <&ccu CLK_C1CPUX>; @@ -127,7 +127,7 @@ cpu@101 { #cooling-cells = <2>; }; - cpu@102 { + cpu102: cpu@102 { compatible = "arm,cortex-a7"; device_type = "cpu"; clocks = <&ccu CLK_C1CPUX>; @@ -138,7 +138,7 @@ cpu@102 { #cooling-cells = <2>; }; - cpu@103 { + cpu103: cpu@103 { compatible = "arm,cortex-a7"; device_type = "cpu"; clocks = <&ccu CLK_C1CPUX>; @@ -1188,12 +1188,60 @@ cpu0_thermal: cpu0-thermal { polling-delay-passive = <0>; polling-delay = <0>; thermal-sensors = <&ths 0>; + + trips { + cpu0_hot: cpu-hot { + temperature = <80000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu0_very_hot: cpu-very-hot { + temperature = <100000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + cpu-hot-limit { + trip = <&cpu0_hot>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; cpu1_thermal: cpu1-thermal { polling-delay-passive = <0>; polling-delay = <0>; thermal-sensors = <&ths 1>; + + trips { + cpu1_hot: cpu-hot { + temperature = <80000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu1_very_hot: cpu-very-hot { + temperature = <100000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + cpu-hot-limit { + trip = <&cpu1_hot>; + cooling-device = <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; gpu_thermal: gpu-thermal {
This enables passive cooling by down-regulating CPU voltage and frequency. Signed-off-by: Ondrej Jirman <megous@megous.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 60 +++++++++++++++++++++++++++---- 1 file changed, 54 insertions(+), 6 deletions(-)