diff mbox series

[v2] ARM: dts: sun8i-h3: Add thermal trip points/cooling maps

Message ID 20200224165446.334712-1-megous@megous.com (mailing list archive)
State Mainlined
Commit 7ad9f3d0cb2f2b886c068f99e791bd41ceb0677a
Headers show
Series [v2] ARM: dts: sun8i-h3: Add thermal trip points/cooling maps | expand

Commit Message

Ondřej Jirman Feb. 24, 2020, 4:54 p.m. UTC
This enables passive cooling by down-regulating CPU voltage
and frequency.

For trip points, I used a slightly lowered values from the BSP
code. The critical temperature of 110°C from BSP code seemed
like a lot, so I rounded it off to 100°C.

The critical trip point value is 30°C above the maximum recommended
ambient temperature (70°C) for the SoC from the datasheet, so there's
some headroom even at such a high ambient temperature.

Signed-off-by: Ondrej Jirman <megous@megous.com>
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

v2:
- added more detail to the commit description

Comments

Maxime Ripard Feb. 25, 2020, 9:04 a.m. UTC | #1
On Mon, Feb 24, 2020 at 05:54:46PM +0100, Ondrej Jirman wrote:
> This enables passive cooling by down-regulating CPU voltage
> and frequency.
>
> For trip points, I used a slightly lowered values from the BSP
> code. The critical temperature of 110°C from BSP code seemed
> like a lot, so I rounded it off to 100°C.
>
> The critical trip point value is 30°C above the maximum recommended
> ambient temperature (70°C) for the SoC from the datasheet, so there's
> some headroom even at such a high ambient temperature.
>
> Signed-off-by: Ondrej Jirman <megous@megous.com>

Applied, thanks

Maxime
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 20217e2ca4d3a..e83aa6866e7ea 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -41,6 +41,7 @@ 
  */
 
 #include "sunxi-h3-h5.dtsi"
+#include <dt-bindings/thermal/thermal.h>
 
 / {
 	cpu0_opp_table: opp_table0 {
@@ -227,6 +228,30 @@  cpu_thermal: cpu-thermal {
 			polling-delay-passive = <0>;
 			polling-delay = <0>;
 			thermal-sensors = <&ths 0>;
+
+			trips {
+				cpu_hot_trip: cpu-hot {
+					temperature = <80000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+
+				cpu_very_hot_trip: cpu-very-hot {
+					temperature = <100000>;
+					hysteresis = <0>;
+					type = "critical";
+				};
+			};
+
+			cooling-maps {
+				cpu-hot-limit {
+					trip = <&cpu_hot_trip>;
+					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
 		};
 	};
 };