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Tue, 25 Feb 2020 08:12:08 -0800 (PST) Received: from 1aq-andre.garage.tyco.com ([77.107.218.170]) by smtp.gmail.com with ESMTPSA id h10sm4757339wml.18.2020.02.25.08.12.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Feb 2020 08:12:08 -0800 (PST) From: =?utf-8?q?Andr=C3=A9_Draszik?= To: linux-kernel@vger.kernel.org Subject: [PATCH v2 5/6] Input: snvs_pwrkey - enable snvs clock as needed Date: Tue, 25 Feb 2020 16:12:00 +0000 Message-Id: <20200225161201.1975-5-git@andred.net> X-Mailer: git-send-email 2.23.0.rc1 In-Reply-To: <20200225161201.1975-1-git@andred.net> References: <20200225161201.1975-1-git@andred.net> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200225_081210_072834_1F10AD7B X-CRM114-Status: GOOD ( 18.82 ) X-Spam-Score: 0.2 (/) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [209.85.221.66 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [209.85.221.66 listed in wl.mailspike.net] 0.2 HEADER_FROM_DIFFERENT_DOMAINS From and EnvelopeFrom 2nd level mail domains are different 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [andre.draszik[at]gmail.com] 0.0 FREEMAIL_FORGED_FROMDOMAIN 2nd level domains in From and EnvelopeFrom freemail headers are different X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Aymen Sghaier , Herbert Xu , =?utf-8?q?Horia_Geant=C4=83?= , Anson Huang , =?utf-8?q?Andr=C3=A9_Draszik?= , Sascha Hauer , Dmitry Torokhov , Fabio Estevam , Rob Herring , NXP Linux Team , Pengutronix Kernel Team , linux-input@vger.kernel.org, Robin Gong , Shawn Guo , "David S. Miller" , linux-arm-kernel@lists.infradead.org, linux-crypto@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org At the moment, enabling this driver without the SNVS RTC driver being active will hang the kernel as soon as the power button is pressed. The reason is that in that case the SNVS isn't enabled, and any attempt to read the SNVS registers will simply hang forever. Ensure the clock is enabled (during the interrupt handler) to make this driver work. Also see commit 7f8993995410 ("drivers/rtc/rtc-snvs: add clock support") and commit edb190cb1734 ("rtc: snvs: make sure clock is enabled for interrupt handle") for similar updates to the snvs rtc driver. Signed-off-by: André Draszik Cc: "Horia Geantă" Cc: Aymen Sghaier Cc: Herbert Xu Cc: "David S. Miller" Cc: Rob Herring Cc: Mark Rutland Cc: Shawn Guo Cc: Sascha Hauer Cc: Pengutronix Kernel Team Cc: Fabio Estevam Cc: NXP Linux Team Cc: Dmitry Torokhov Cc: Anson Huang Cc: Robin Gong Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-input@vger.kernel.org --- v2: * drop redundant tests and simplify error handling by using devm_clk_get_optional() * add clock handling to imx_imx_snvs_check_for_events() --- drivers/input/keyboard/snvs_pwrkey.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/drivers/input/keyboard/snvs_pwrkey.c b/drivers/input/keyboard/snvs_pwrkey.c index 2f5e3ab5ed63..382d2ae82c9b 100644 --- a/drivers/input/keyboard/snvs_pwrkey.c +++ b/drivers/input/keyboard/snvs_pwrkey.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -38,6 +39,7 @@ struct pwrkey_drv_data { int wakeup; struct timer_list check_timer; struct input_dev *input; + struct clk *clk; u8 minor_rev; }; @@ -47,7 +49,10 @@ static void imx_imx_snvs_check_for_events(struct timer_list *t) struct input_dev *input = pdata->input; u32 state; + clk_enable(pdata->clk); regmap_read(pdata->snvs, SNVS_HPSR_REG, &state); + clk_disable(pdata->clk); + state = state & SNVS_HPSR_BTN ? 1 : 0; /* only report new event if status changed */ @@ -74,11 +79,13 @@ static irqreturn_t imx_snvs_pwrkey_interrupt(int irq, void *dev_id) pm_wakeup_event(input->dev.parent, 0); + clk_enable(pdata->clk); + regmap_read(pdata->snvs, SNVS_LPSR_REG, &lp_status); if (lp_status & SNVS_LPSR_SPO) { if (pdata->minor_rev == 0) { /* - * The first generation i.MX6 SoCs only sends an + * The first generation i.MX[6|7] SoCs only send an * interrupt on button release. To mimic power-key * usage, we'll prepend a press event. */ @@ -96,6 +103,8 @@ static irqreturn_t imx_snvs_pwrkey_interrupt(int irq, void *dev_id) /* clear SPO status */ regmap_write(pdata->snvs, SNVS_LPSR_REG, SNVS_LPSR_SPO); + clk_disable(pdata->clk); + return IRQ_HANDLED; } @@ -140,6 +149,23 @@ static int imx_snvs_pwrkey_probe(struct platform_device *pdev) if (pdata->irq < 0) return -EINVAL; + pdata->clk = devm_clk_get_optional(&pdev->dev, "snvs-pwrkey"); + if (IS_ERR(pdata->clk)) + return PTR_ERR(pdata->clk); + + error = clk_prepare(pdata->clk); + if (error) { + dev_err(&pdev->dev, "failed to prepare the snvs clock\n"); + return error; + } + error = devm_add_action_or_reset(&pdev->dev, + (void(*)(void *))clk_unprepare, + pdata->clk); + if (error) { + dev_err(&pdev->dev, "failed to add reset action on 'snvs-pwrkey'"); + return error; + } + regmap_read(pdata->snvs, SNVS_HPVIDR1_REG, &vid); pdata->minor_rev = vid & 0xff;