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X-Microsoft-Antispam-Message-Info: HG5VzL43gkz4iT1onN4rJEj93FtKn8QT/RrDOv1uNHOB98BGxmqEfdbtfqs705sNpFKKde/trydbgWaqS920hL49ytJvSsPX5RiLaVhu1a2SRrOF0gQ/klQad3vhH0w/81Out07Vfq9u9YNPC5xBSdV0vAzxR3np+aI70qigHxiYYJeDWioH9n2n92BtqYBMho72wwgxIfjrzyk53RJ1ULKChQTTgKaQYSwJiMfczApes1TlOHlJX+yEQrW4wxHqm2Cc46OEjcWbipORmILUQ4LhDY+xNut+2ViyRpvUfC6UyZZvNIVCEvBXcwhz4zFXhNpXWiW/uBXAggbGjTDV8YVjX2Ivg/kxOCN6eoHQWEvuVCn3n235PhRoaTWWECpC+VhUgZGA1tlpiQwoLmFps3LhVuShQ6IZxgMFhWV+bl4xejTopxLDOX0FhIuwaLfvFsvLuKUgkLbwITsoUiC7dbqnJLk++uy2VKDMDp5yPGx05Fnvlv1WqV41QXMtPG8rcYhS/q/cYoQT99C6Kbj4c0pttEl1Dh1A7tUnRJdGgSY= X-MS-Exchange-AntiSpam-MessageData: KT91vDFigVZlTfttwv3V8ZFzn/0ll3hil8G2Ssn2/SHVS9/EXAnIvFPldx773e9GRFuls1zWTKiW8qCDarchi4dY2/ZJMkrDnMv/cqSeVJtUYDBx0zhkJh2rokE152b+P2minEHVUlj7MdZE1xyOng== X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 68682f5d-8dc9-41c4-c30f-08d7ba8ebb71 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Feb 2020 07:37:29.1050 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: UgSgPP46wOajZ4j06UMJLh9Cl7W+r9YXLYZ7316IDQJKJfjfy2KRCGgd4Cg4cS1GFNAwWqDaWs61D+uBy9Y6Mg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB7PR04MB4281 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200225_233733_463417_939DDBB2 X-CRM114-Status: GOOD ( 12.59 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [40.107.13.52 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.0 MSGID_FROM_MTA_HEADER Message-Id was added by a relay X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The DDR Perf for i.MX8 is a system PMU whose axi id would different from SoC to SoC. Need expose system PMU identifier for userspace which refer to /sys/bus/event_source/devices//identifier. Signed-off-by: Joakim Zhang --- drivers/perf/fsl_imx8_ddr_perf.c | 45 +++++++++++++++++++++++++++++--- 1 file changed, 42 insertions(+), 3 deletions(-) diff --git a/drivers/perf/fsl_imx8_ddr_perf.c b/drivers/perf/fsl_imx8_ddr_perf.c index 95dca2cb5265..88addbffbbd0 100644 --- a/drivers/perf/fsl_imx8_ddr_perf.c +++ b/drivers/perf/fsl_imx8_ddr_perf.c @@ -50,21 +50,38 @@ static DEFINE_IDA(ddr_ida); struct fsl_ddr_devtype_data { unsigned int quirks; /* quirks needed for different DDR Perf core */ + const char *identifier; /* system PMU identifier for userspace */ }; -static const struct fsl_ddr_devtype_data imx8_devtype_data; +static const struct fsl_ddr_devtype_data imx8_devtype_data = { + .identifier = "i.MX8", +}; + +static const struct fsl_ddr_devtype_data imx8mq_devtype_data = { + .quirks = DDR_CAP_AXI_ID_FILTER, + .identifier = "i.MX8MQ", +}; + +static const struct fsl_ddr_devtype_data imx8mm_devtype_data = { + .quirks = DDR_CAP_AXI_ID_FILTER, + .identifier = "i.MX8MM", +}; -static const struct fsl_ddr_devtype_data imx8m_devtype_data = { +static const struct fsl_ddr_devtype_data imx8mn_devtype_data = { .quirks = DDR_CAP_AXI_ID_FILTER, + .identifier = "i.MX8MN", }; static const struct fsl_ddr_devtype_data imx8mp_devtype_data = { .quirks = DDR_CAP_AXI_ID_FILTER_ENHANCED, + .identifier = "i.MX8MP", }; static const struct of_device_id imx_ddr_pmu_dt_ids[] = { { .compatible = "fsl,imx8-ddr-pmu", .data = &imx8_devtype_data}, - { .compatible = "fsl,imx8m-ddr-pmu", .data = &imx8m_devtype_data}, + { .compatible = "fsl,imx8mq-ddr-pmu", .data = &imx8mq_devtype_data}, + { .compatible = "fsl,imx8mm-ddr-pmu", .data = &imx8mm_devtype_data}, + { .compatible = "fsl,imx8mn-ddr-pmu", .data = &imx8mn_devtype_data}, { .compatible = "fsl,imx8mp-ddr-pmu", .data = &imx8mp_devtype_data}, { /* sentinel */ } }; @@ -84,6 +101,27 @@ struct ddr_pmu { int id; }; +static ssize_t ddr_perf_identifier_show(struct device *dev, + struct device_attribute *attr, + char *page) +{ + struct ddr_pmu *pmu = dev_get_drvdata(dev); + + return sprintf(page, "%s\n", pmu->devtype_data->identifier); +} + +static struct device_attribute ddr_perf_identifier_attr = + __ATTR(identifier, 0444, ddr_perf_identifier_show, NULL); + +static struct attribute *ddr_perf_identifier_attrs[] = { + &ddr_perf_identifier_attr.attr, + NULL, +}; + +static struct attribute_group ddr_perf_identifier_attr_group = { + .attrs = ddr_perf_identifier_attrs, +}; + enum ddr_perf_filter_capabilities { PERF_CAP_AXI_ID_FILTER = 0, PERF_CAP_AXI_ID_FILTER_ENHANCED, @@ -237,6 +275,7 @@ static const struct attribute_group *attr_groups[] = { &ddr_perf_format_attr_group, &ddr_perf_cpumask_attr_group, &ddr_perf_filter_cap_attr_group, + &ddr_perf_identifier_attr_group, NULL, };