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Wed, 11 Mar 2020 05:46:56 -0700 (PDT) From: Jean-Philippe Brucker To: bhelgaas@google.com, will@kernel.org, robh+dt@kernel.org, joro@8bytes.org, baolu.lu@linux.intel.com, sudeep.holla@arm.com, linux-doc@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-acpi@vger.kernel.org, iommu@lists.linux-foundation.org Subject: [PATCH v2 02/11] PCI: Add ats_supported host bridge flag Date: Wed, 11 Mar 2020 13:44:57 +0100 Message-Id: <20200311124506.208376-3-jean-philippe@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200311124506.208376-1-jean-philippe@linaro.org> References: <20200311124506.208376-1-jean-philippe@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200311_054658_365334_145CFAC6 X-CRM114-Status: GOOD ( 12.26 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:441 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, Jean-Philippe Brucker , lorenzo.pieralisi@arm.com, frowand.list@gmail.com, corbet@lwn.net, liviu.dudau@arm.com, rjw@rjwysocki.net, guohanjun@huawei.com, amurray@thegoodpenguin.co.uk, robin.murphy@arm.com, dwmw2@infradead.org, lenb@kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Each vendor has their own way of describing whether a host bridge supports ATS. The Intel and AMD ACPI tables selectively enable or disable ATS per device or sub-tree, while Arm has a single bit for each host bridge. For those that need it, add an ats_supported bit to the host bridge structure. Signed-off-by: Jean-Philippe Brucker --- v1->v2: try to improve the comment --- drivers/pci/probe.c | 8 ++++++++ include/linux/pci.h | 1 + 2 files changed, 9 insertions(+) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 512cb4312ddd..b5e36f06b40a 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -598,6 +598,14 @@ static void pci_init_host_bridge(struct pci_host_bridge *bridge) bridge->native_shpc_hotplug = 1; bridge->native_pme = 1; bridge->native_ltr = 1; + + /* + * Some systems (ACPI IORT, device-tree) declare ATS support at the host + * bridge, and clear this bit when ATS isn't supported. Others (ACPI + * DMAR and IVRS) declare ATS support with a smaller granularity, and + * need this bit set. + */ + bridge->ats_supported = 1; } struct pci_host_bridge *pci_alloc_host_bridge(size_t priv) diff --git a/include/linux/pci.h b/include/linux/pci.h index 3840a541a9de..9fe2e84d74d7 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -511,6 +511,7 @@ struct pci_host_bridge { unsigned int native_pme:1; /* OS may use PCIe PME */ unsigned int native_ltr:1; /* OS may use PCIe LTR */ unsigned int preserve_config:1; /* Preserve FW resource setup */ + unsigned int ats_supported:1; /* Resource alignment requirements */ resource_size_t (*align_resource)(struct pci_dev *dev,