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X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:341 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This adds the controller and pinctrl nodes for the Amlogic G12A SPICC controllers. Signed-off-by: Neil Armstrong --- Kevin, This depends on the CLKID_SPICC0_SCLK and CLKID_SPICC1_SCLK introduced in https://lore.kernel.org/linux-arm-kernel/20200219084928.28707-2-narmstrong@baylibre.com/ Neil .../boot/dts/amlogic/meson-g12-common.dtsi | 75 +++++++++++++++++++ 1 file changed, 75 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi index abe04f4ad7d8..3e1dfa80651d 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi @@ -957,6 +957,57 @@ }; }; + spicc0_x_pins: spicc0-x { + mux { + groups = "spi0_mosi_x", + "spi0_miso_x", + "spi0_clk_x"; + function = "spi0"; + drive-strength-microamp = <4000>; + bias-disable; + }; + }; + + spicc0_ss0_x_pins: spicc0-ss0-x { + mux { + groups = "spi0_ss0_x"; + function = "spi0"; + drive-strength-microamp = <4000>; + bias-disable; + }; + }; + + spicc0_c_pins: spicc0-c { + mux { + groups = "spi0_mosi_c", + "spi0_miso_c", + "spi0_ss0_c", + "spi0_clk_c"; + function = "spi0"; + drive-strength-microamp = <4000>; + bias-disable; + }; + }; + + spicc1_pins: spicc1 { + mux { + groups = "spi1_mosi", + "spi1_miso", + "spi1_clk"; + function = "spi1"; + drive-strength-microamp = <4000>; + }; + }; + + spicc1_ss0_pins: spicc1-ss0 { + mux { + groups = "spi1_ss0"; + function = "spi1"; + drive-strength-microamp = <4000>; + bias-disable; + }; + }; + tdm_a_din0_pins: tdm-a-din0 { mux { groups = "tdm_a_din0"; @@ -2051,6 +2102,30 @@ amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>; }; + spicc0: spi@13000 { + compatible = "amlogic,meson-g12a-spicc"; + reg = <0x0 0x13000 0x0 0x44>; + interrupts = ; + clocks = <&clkc CLKID_SPICC0>, + <&clkc CLKID_SPICC0_SCLK>; + clock-names = "core", "pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spicc1: spi@15000 { + compatible = "amlogic,meson-g12a-spicc"; + reg = <0x0 0x15000 0x0 0x44>; + interrupts = ; + clocks = <&clkc CLKID_SPICC1>, + <&clkc CLKID_SPICC1_SCLK>; + clock-names = "core", "pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + pwm_ef: pwm@19000 { compatible = "amlogic,meson-g12a-ee-pwm"; reg = <0x0 0x19000 0x0 0x20>;