| Message ID | 20200313095804.18537-1-l.stach@pengutronix.de (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 49b027156b3ca3daddb708c980d14ce7cb891419 |
| Headers | show |
| Series | ARM: dts: imx6: RDU2: assign video PLL as input to LDB | expand |
On Fri, Mar 13, 2020 at 10:58:04AM +0100, Lucas Stach wrote: > Currently we don't ensure that the LDB is clocked from the video PLL > and relied on the bootloader to do the correct setup. This isn't always > true, in which case we would run with a vastly different video clock > than the desired one. Fix this by assigning the proper parent to the > LDB. > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Applied, thanks.
diff --git a/arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi b/arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi index 0075637f9b0b..20350e803377 100644 --- a/arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi +++ b/arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi @@ -216,6 +216,13 @@ }; }; +&clks { + assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, + <&clks IMX6QDL_CLK_LDB_DI1_SEL>; + assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>, + <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>; +}; + &cpu0 { fsl,soc-operating-points = < /* ARM kHz SOC-PU uV */
Currently we don't ensure that the LDB is clocked from the video PLL and relied on the bootloader to do the correct setup. This isn't always true, in which case we would run with a vastly different video clock than the desired one. Fix this by assigning the proper parent to the LDB. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)