From patchwork Mon Mar 16 07:23:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Lu X-Patchwork-Id: 11439841 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CD9A414E5 for ; Mon, 16 Mar 2020 07:35:01 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AA13320679 for ; Mon, 16 Mar 2020 07:35:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="iCRe4oXC"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="L5S8qPJA" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org AA13320679 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=RVfw3fLn4H/otZlQy0C2qbCyV9Vo9u+NjS1c3++DrIg=; b=iCRe4oXCZV06Zj Hgy5/lRipclwEVV0r8xeUqvjL6fVNfZqrM7BNoi1RU/oYpQqsS+WmEMYNk019JiwYkGdgr1R4EmZQ CvpYRNCECw7ww+Qa/tT96G/QSeBA9+xClre7maBSD0yX8OkWBTYsspvfuMtzN0W1K6HgHrgvgYl1x zDMV2kdf7NfiW127sztxcxJkzA35FECj78WiHmaO43UdCB4m4cLWLb9KMTwO8ji19zuaR8Zy/Qtuv UTdYd7RGQOS1OXLojvQhapYKPUrf5srZqW9+Yl1ndVKQdVspGlguKcQiXNV1/DagmwQaR08ou0e9l QMHrznQV+fev8c9ESmmg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jDkH5-0000JS-RD; Mon, 16 Mar 2020 07:34:59 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jDkGt-00007f-BC; Mon, 16 Mar 2020 07:34:48 +0000 X-UUID: bba4515da9d54e56a147976aea2d47fd-20200315 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=Et48gACf9Egz+SR4ne4zbTYMcE1fV+LhbFdrbAdWJRk=; b=L5S8qPJAItguBjZM8gqD9CECe6APUY0zXPK3EAAab/edTqolxVn43L7SXdKlYQNFittOSY7ZSZT+NICzN7i7RilAV/NXhRtyzjZHwhdeLtMoVDdN7X7JCP0jVH+wuy4IvrCwByBFzMxIRTgZAHerjvoNBIDnLQ6bZSrHg2xpCkg=; X-UUID: bba4515da9d54e56a147976aea2d47fd-20200315 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLS) with ESMTP id 969705265; Sun, 15 Mar 2020 23:34:42 -0800 Received: from MTKMBS01N2.mediatek.inc (172.21.101.79) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 16 Mar 2020 00:24:58 -0700 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 16 Mar 2020 15:23:02 +0800 Received: from mtksdaap41.mediatek.inc (172.21.77.4) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 16 Mar 2020 15:21:41 +0800 From: Roger Lu To: Kevin Hilman , Rob Herring , Nicolas Boichat , Stephen Boyd Subject: [PATCH v7 1/3] dt-bindings: soc: add mtk svs dt-bindings Date: Mon, 16 Mar 2020 15:23:15 +0800 Message-ID: <20200316072316.7156-2-roger.lu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200316072316.7156-1-roger.lu@mediatek.com> References: <20200316072316.7156-1-roger.lu@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 112A0A39678B4604765912F345C1DC43D8BA2C8BC42B043C5E958F65E334171E2000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200316_003447_384036_77BD1667 X-CRM114-Status: UNSURE ( 9.72 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [216.200.240.184 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.0 MIME_BASE64_TEXT RAW: Message text disguised using base64 encoding -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.0 UNPARSEABLE_RELAY Informational: message has unparseable relay lines X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Nishanth Menon , Angus Lin , devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Roger Lu , linux-kernel@vger.kernel.org, Xiaoqing Liu , YT Lee , Fan Chen , linux-mediatek@lists.infradead.org, HenryC Chen , Charles Yang , Matthias Brugger , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Document the binding for enabling mtk svs on MediaTek SoC. Signed-off-by: Roger Lu --- .../devicetree/bindings/power/mtk-svs.txt | 76 +++++++++++++++++++ 1 file changed, 76 insertions(+) create mode 100644 Documentation/devicetree/bindings/power/mtk-svs.txt diff --git a/Documentation/devicetree/bindings/power/mtk-svs.txt b/Documentation/devicetree/bindings/power/mtk-svs.txt new file mode 100644 index 000000000000..9a3e81b9e1d2 --- /dev/null +++ b/Documentation/devicetree/bindings/power/mtk-svs.txt @@ -0,0 +1,76 @@ +* Mediatek Smart Voltage Scaling (MTK SVS) + +This describes the device tree binding for the MTK SVS controller (bank) +which helps provide the optimized CPU/GPU/CCI voltages. This device also +needs thermal data to calculate thermal slope for accurately compensate +the voltages when temperature change. + +Required properties: +- compatible: + - "mediatek,mt8183-svs" : For MT8183 family of SoCs +- reg: Address range of the MTK SVS controller. +- interrupts: IRQ for the MTK SVS controller. +- clocks, clock-names: Clocks needed for the svs hardware. required + clocks are: + "main": Main clock for svs controller to work. +- nvmem-cells: Phandle to the calibration data provided by a nvmem device. +- nvmem-cell-names: Should be "svs-calibration-data" and "calibration-data" + +Subnodes: +- svs-cpu-little: SVS bank device node of little CPU + compatible: "mediatek,mt8183-svs-cpu-little" + operating-points-v2: OPP table hooked by SVS little CPU bank. + SVS will optimze this OPP table voltage part. + vcpu-little-supply: PMIC buck of little CPU +- svs-cpu-big: SVS bank device node of big CPU + compatible: "mediatek,mt8183-svs-cpu-big" + operating-points-v2: OPP table hooked by SVS big CPU bank. + SVS will optimze this OPP table voltage part. + vcpu-big-supply: PMIC buck of big CPU +- svs-cci: SVS bank device node of CCI + compatible: "mediatek,mt8183-svs-cci" + operating-points-v2: OPP table hooked by SVS CCI bank. + SVS will optimze this OPP table voltage part. + vcci-supply: PMIC buck of CCI +- svs-gpu: SVS bank device node of GPU + compatible: "mediatek,mt8183-svs-gpu" + operating-points-v2: OPP table hooked by SVS GPU bank. + SVS will optimze this OPP table voltage part. + vgpu-supply: PMIC buck of GPU + +Example: + + svs: svs@1100b000 { + compatible = "mediatek,mt8183-svs"; + reg = <0 0x1100b000 0 0x1000>; + interrupts = ; + clocks = <&infracfg CLK_INFRA_THERM>; + clock-names = "main_clk"; + nvmem-cells = <&svs_calibration>, <&thermal_calibration>; + nvmem-cell-names = "svs-calibration-data", "calibration-data"; + + svs_cpu_little: svs-cpu-little { + compatible = "mediatek,mt8183-svs-cpu-little"; + operating-points-v2 = <&cluster0_opp>; + vcpu-little-supply = <&mt6358_vproc12_reg>; + }; + + svs_cpu_big: svs-cpu-big { + compatible = "mediatek,mt8183-svs-cpu-big"; + operating-points-v2 = <&cluster1_opp>; + vcpu-big-supply = <&mt6358_vproc11_reg>; + }; + + svs_cci: svs-cci { + compatible = "mediatek,mt8183-svs-cci"; + operating-points-v2 = <&cci_opp>; + vcci-supply = <&mt6358_vproc12_reg>; + }; + + svs_gpu: svs-gpu { + compatible = "mediatek,mt8183-svs-gpu"; + power-domains = <&scpsys MT8183_POWER_DOMAIN_MFG_2D>; + operating-points-v2 = <&gpu_opp_table>; + vgpu-spply = <&mt6358_vgpu_reg>; + }; + };