From patchwork Mon Mar 16 16:50:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 11440831 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E25A514B4 for ; Mon, 16 Mar 2020 16:54:53 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 593F620679 for ; Mon, 16 Mar 2020 16:54:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="bjl0MTHY" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 593F620679 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=hCReWJQxlg3WAmkcn9v5lRTuJ4I9nq7pN3Oti5f6nvk=; b=bjl0MTHYPn9HaN bdT4IPEUBey7DXhK+/dj7wj56WGohRqT7C6JSnD+XcHjnob+xTkRyG2isQVzc7hmn+zEXw9rFUDUS +aVshXTZwi09ch98dvp2ZzW9z+EzKdaPzb0+dQToppfLps9lU2VvCDjCxv55N5icrtyDgY+bhd1n9 VDuafKeAUxbWyJXS4Z3QYdXmsfX9Wnqjsjg43Mn36Zh2bWBrqG2Jyk9B4COlUIKMKlOAsbmf9DDoB HriGMyOw0E58uw05963tT4SplLj+asyK6b5iIujN54RwWLYmLlarzPFkT1rbb9cgmBTGCXfiksrHh Ltr8515WG3CbPoxVNafQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jDt0n-0000X5-GT; Mon, 16 Mar 2020 16:54:45 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jDsxc-0005jG-2p for linux-arm-kernel@lists.infradead.org; Mon, 16 Mar 2020 16:51:29 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2820313D5; Mon, 16 Mar 2020 09:51:27 -0700 (PDT) Received: from localhost (unknown [10.37.6.21]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9FE373F67D; Mon, 16 Mar 2020 09:51:26 -0700 (PDT) From: Mark Brown To: Catalin Marinas , Will Deacon Subject: [PATCH v10 13/13] arm64: BTI: Add Kconfig entry for userspace BTI Date: Mon, 16 Mar 2020 16:50:55 +0000 Message-Id: <20200316165055.31179-14-broonie@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200316165055.31179-1-broonie@kernel.org> References: <20200316165055.31179-1-broonie@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200316_095128_256482_5ADA075A X-CRM114-Status: GOOD ( 12.29 ) X-Spam-Score: -2.1 (--) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-2.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [217.140.110.172 listed in list.dnswl.org] 0.2 HEADER_FROM_DIFFERENT_DOMAINS From and EnvelopeFrom 2nd level mail domains are different -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paul Elliott , Peter Zijlstra , Andrew Jones , Amit Kachhap , Vincenzo Frascino , linux-arch@vger.kernel.org, Marc Zyngier , Eugene Syromiatnikov , Szabolcs Nagy , Dave Martin , "H . J . Lu " , Yu-cheng Yu , Kees Cook , Arnd Bergmann , Jann Horn , Richard Henderson , =?utf-8?q?Kristina_Mart?= =?utf-8?q?=C5=A1enko?= , Mark Brown , Alexander Viro , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, Florian Weimer , linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, Sudakshina Das Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Dave Martin Now that the code for userspace BTI support is in the kernel add the Kconfig entry so that it can be built and used. [Split out of "arm64: Basic Branch Target Identification support" -- broonie] Signed-off-by: Dave Martin Reviewed-by: Kees Cook Signed-off-by: Mark Brown --- arch/arm64/Kconfig | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 8a15bc68dadd..d65d226a77ec 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -1522,6 +1522,28 @@ endmenu menu "ARMv8.5 architectural features" +config ARM64_BTI + bool "Branch Target Identification support" + default y + help + Branch Target Identification (part of the ARMv8.5 Extensions) + provides a mechanism to limit the set of locations to which computed + branch instructions such as BR or BLR can jump. + + To make use of BTI on CPUs that support it, say Y. + + BTI is intended to provide complementary protection to other control + flow integrity protection mechanisms, such as the Pointer + authentication mechanism provided as part of the ARMv8.3 Extensions. + For this reason, it does not make sense to enable this option without + also enabling support for pointer authentication. Thus, when + enabling this option you should also select ARM64_PTR_AUTH=y. + + Userspace binaries must also be specifically compiled to make use of + this mechanism. If you say N here or the hardware does not support + BTI, such binaries can still run, but you get no additional + enforcement of branch destinations. + config ARM64_E0PD bool "Enable support for E0PD" default y