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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id 127sm3754936wmd.38.2020.03.31.05.13.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 31 Mar 2020 05:13:59 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de Subject: [RFC PATCH v3 1/2] dt-bindings: sram: convert rockchip-pmu-sram bindings to yaml Date: Tue, 31 Mar 2020 14:13:51 +0200 Message-Id: <20200331121352.3825-1-jbx6244@gmail.com> X-Mailer: git-send-email 2.11.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200331_090356_399000_A8F99F13 X-CRM114-Status: GOOD ( 14.24 ) X-Spam-Score: 0.1 (/) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:541 listed in] [list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [jbx6244[at]gmail.com] 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit [jbx6244[at]gmail.com] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, robh+dt@kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Current dts files with 'rockchip-pmu-sram' compatible nodes are now verified with sram.yaml, although the original text document still exists. Merge rockchip-pmu-sram.txt with sram.yaml by adding it as description with an example. Signed-off-by: Johan Jonker --- Not tested with hardware. Changes v3: Document the compatible Changed v2: Merge with sram.yaml --- .../devicetree/bindings/sram/rockchip-pmu-sram.txt | 16 ---------------- Documentation/devicetree/bindings/sram/sram.yaml | 14 ++++++++++++++ 2 files changed, 14 insertions(+), 16 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sram/rockchip-pmu-sram.txt diff --git a/Documentation/devicetree/bindings/sram/rockchip-pmu-sram.txt b/Documentation/devicetree/bindings/sram/rockchip-pmu-sram.txt deleted file mode 100644 index 6b42fda30..000000000 --- a/Documentation/devicetree/bindings/sram/rockchip-pmu-sram.txt +++ /dev/null @@ -1,16 +0,0 @@ -Rockchip SRAM for pmu: ------------------------------- - -The sram of pmu is used to store the function of resume from maskrom(the 1st -level loader). This is a common use of the "pmu-sram" because it keeps power -even in low power states in the system. - -Required node properties: -- compatible : should be "rockchip,rk3288-pmu-sram" -- reg : physical base address and the size of the registers window - -Example: - sram@ff720000 { - compatible = "rockchip,rk3288-pmu-sram", "mmio-sram"; - reg = <0xff720000 0x1000>; - }; diff --git a/Documentation/devicetree/bindings/sram/sram.yaml b/Documentation/devicetree/bindings/sram/sram.yaml index 7b83cc6c9..605eb1460 100644 --- a/Documentation/devicetree/bindings/sram/sram.yaml +++ b/Documentation/devicetree/bindings/sram/sram.yaml @@ -29,6 +29,7 @@ properties: enum: - mmio-sram - atmel,sama5d2-securam + - rockchip,rk3288-pmu-sram reg: maxItems: 1 @@ -224,6 +225,19 @@ examples: }; - | + // Rockchip's rk3288 SoC uses the sram of pmu to store the function of + // resume from maskrom(the 1st level loader). This is a common use of + // the "pmu-sram" because it keeps power even in low power states + // in the system. + sram@ff720000 { + compatible = "rockchip,rk3288-pmu-sram", "mmio-sram"; + reg = <0xff720000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xff720000 0x1000>; + }; + + - | // Allwinner's A80 SoC uses part of the secure sram for hotplugging of the // primary core (cpu0). Once the core gets powered up it checks if a magic // value is set at a specific location. If it is then the BROM will jump