diff mbox series

ARM: dts: shmobile: Update CMT1 compatible values

Message ID 20200420151553.22975-1-geert+renesas@glider.be (mailing list archive)
State Mainlined
Commit fea89b265f78b639c4845be6b3778a2957eac4bc
Headers show
Series ARM: dts: shmobile: Update CMT1 compatible values | expand

Commit Message

Geert Uytterhoeven April 20, 2020, 3:15 p.m. UTC
New compatible values were introduced for the 48-bit CMT devices on
SH-Mobile AG5 and R-Mobile A1, and the old "cmt-48"-based values were
deprecated.  However, the actual DTS files were never updated.

See also commits:
  - 81b604c39997de91 ("dt-bindings: timer: renesas, cmt: Update CMT1 on
    sh73a0 and r8a7740"),
  - 8c1afba285a86b9d ("clocksource/drivers/sh_cmt: r8a7740 and sh73a0
    SoC-specific match"),
  - 19d608458f4f3bb3 ("clocksource/drivers/sh_cmt: Document "cmt-48" as
    deprecated").

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Aforementioned commits are present in v5.4 and later.

To be queued in renesas-devel for v5.8.
---
 arch/arm/boot/dts/r8a7740.dtsi | 2 +-
 arch/arm/boot/dts/sh73a0.dtsi  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index ebc1ff64f530d42c..014805894ea71f41 100644
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -83,7 +83,7 @@ 
 	};
 
 	cmt1: timer@e6138000 {
-		compatible = "renesas,cmt-48-r8a7740", "renesas,cmt-48";
+		compatible = "renesas,r8a7740-cmt1";
 		reg = <0xe6138000 0x170>;
 		interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&mstp3_clks R8A7740_CLK_CMT1>;
diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index fa5108f142ca974b..99503dd7f55c9cd2 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -104,7 +104,7 @@ 
 	};
 
 	cmt1: timer@e6138000 {
-		compatible = "renesas,cmt-48-sh73a0", "renesas,cmt-48";
+		compatible = "renesas,sh73a0-cmt1";
 		reg = <0xe6138000 0x200>;
 		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&mstp3_clks SH73A0_CLK_CMT1>;