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Fri, 24 Apr 2020 10:13:11 -0500 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Fri, 24 Apr 2020 10:13:11 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Fri, 24 Apr 2020 10:13:11 -0500 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 03OFCu7H122378; Fri, 24 Apr 2020 10:13:10 -0500 From: Tero Kristo To: , Subject: [PATCH 09/17] ARM: dts: dra7-evm: Add CMA pools and enable IPU & DSP rprocs Date: Fri, 24 Apr 2020 18:12:36 +0300 Message-ID: <20200424151244.3225-10-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200424151244.3225-1-t-kristo@ti.com> References: <20200424151244.3225-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200424_081314_826298_1EC6373E X-CRM114-Status: GOOD ( 13.42 ) X-Spam-Score: -2.5 (--) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (-2.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [198.47.23.248 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.0 DKIMWL_WL_HIGH DKIMwl.org - Whitelisted High sender X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: s-anna@ti.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Suman Anna The CMA reserved memory nodes have been added for all the IPU and DSP remoteproc devices on DRA7 EVM board. These nodes are assigned to the respective rproc device nodes, and all the IPU and DSP remote processors are enabled for this board. The current CMA pools and sizes are defined statically for each device. The CMA pools and sizes are defined using 64-bit values to support LPAE. The starting addresses are fixed to meet current dependencies on the remote processor firmwares, and this will go away when the remote-side code has been improved to gather this information runtime during its initialization. An associated pair of the rproc node and its CMA node can be disabled later on if there is no use-case defined to use that remote processor. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo --- arch/arm/boot/dts/dra7-evm.dts | 54 ++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts index af06a55d1c5c..7aeb30daf3b8 100644 --- a/arch/arm/boot/dts/dra7-evm.dts +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -35,6 +35,40 @@ regulator-max-microvolt = <1800000>; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ipu2_memory_region: ipu2-memory@95800000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x95800000 0x0 0x3800000>; + reusable; + status = "okay"; + }; + + dsp1_memory_region: dsp1-memory@99000000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x99000000 0x0 0x4000000>; + reusable; + status = "okay"; + }; + + ipu1_memory_region: ipu1-memory@9d000000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x9d000000 0x0 0x2000000>; + reusable; + status = "okay"; + }; + + dsp2_memory_region: dsp2-memory@9f000000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x9f000000 0x0 0x800000>; + reusable; + status = "okay"; + }; + }; + evm_3v3_sd: fixedregulator-sd { compatible = "regulator-fixed"; regulator-name = "evm_3v3_sd"; @@ -537,3 +571,23 @@ pinctrl-1 = <&dcan1_pins_sleep>; pinctrl-2 = <&dcan1_pins_default>; }; + +&ipu2 { + status = "okay"; + memory-region = <&ipu2_memory_region>; +}; + +&ipu1 { + status = "okay"; + memory-region = <&ipu1_memory_region>; +}; + +&dsp1 { + status = "okay"; + memory-region = <&dsp1_memory_region>; +}; + +&dsp2 { + status = "okay"; + memory-region = <&dsp2_memory_region>; +};